Hi Tom,
On Thu, 2013-05-02 at 04:40 +0100, Tom Lyon wrote:
Virtiio_mmio attempts to mimic the layout of some control registers from
virtio_pci. These registers, in particular VIRTIO_MMIO_QUEUE_SEL and
VIRTIO_PCI_QUEUE_SEL,
are active in nature, and not just passive like a normal memory
Virtiio_mmio attempts to mimic the layout of some control registers from
virtio_pci. These registers, in particular VIRTIO_MMIO_QUEUE_SEL and
VIRTIO_PCI_QUEUE_SEL,
are active in nature, and not just passive like a normal memory
location. Thus, the host side must react immediately upon write
On 05/01/2013 10:25 PM, Michael S. Tsirkin wrote:
On Wed, May 01, 2013 at 08:40:54PM -0700, Tom Lyon wrote:
Virtiio_mmio attempts to mimic the layout of some control registers
from virtio_pci. These registers, in particular
VIRTIO_MMIO_QUEUE_SEL and VIRTIO_PCI_QUEUE_SEL,
are active in nature,
On 05/02/2013 04:37 AM, Pawel Moll wrote:
Hi Tom,
On Thu, 2013-05-02 at 04:40 +0100, Tom Lyon wrote:
Virtiio_mmio attempts to mimic the layout of some control registers from
virtio_pci. These registers, in particular VIRTIO_MMIO_QUEUE_SEL and
VIRTIO_PCI_QUEUE_SEL,
are active in nature, and
On Wed, May 01, 2013 at 08:40:54PM -0700, Tom Lyon wrote:
Virtiio_mmio attempts to mimic the layout of some control registers
from virtio_pci. These registers, in particular
VIRTIO_MMIO_QUEUE_SEL and VIRTIO_PCI_QUEUE_SEL,
are active in nature, and not just passive like a normal memory
