Signed-off-by: George Dunlap
---
Changes since v2:
- Separate PV and HVM passthrough (excluding PVH by implication)
- + not compatible with PoD
- 'will be' -> 'are'
NB that we don't seem to have the referenced file yet; left as a reference.
CC: Ian Jackson
CC: We
Mostly as a placeholder for things not yet considered
Signed-off-by: George Dunlap
---
SUPPORT.md | 2 ++
1 file changed, 2 insertions(+)
diff --git a/SUPPORT.md b/SUPPORT.md
index 72be1414a1..08f3a808be 100644
--- a/SUPPORT.md
+++ b/SUPPORT.md
@@ -132,6 +132,8 @@ Fully virtualised guest using
Signed-off-by: George Dunlap
Acked-by: Jan Beulich
---
Changes since v2:
- Add PoD entry
- memsharing x86 -> experimental, ARM -> {}
CC: Ian Jackson
CC: Wei Liu
CC: Andrew Cooper
CC: Jan Beulich
CC: Stefano Stabellini
CC: Konrad Wilk
CC: Tim Deegan
CC: Tamas K Lengyel
---
SUPP
Migration being one of the key 'non-easy' ones to be added later.
Signed-off-by: George Dunlap
Acked-by: Jan Beulich
---
Changes since v2:
- Capitalization error
CC: Ian Jackson
CC: Wei Liu
CC: Andrew Cooper
CC: Jan Beulich
CC: Stefano Stabellini
CC: Konrad Wilk
CC:
Signed-off-by: George Dunlap
---
Changes since v2:
- Update memory limits for PV guests
CC: Ian Jackson
CC: Wei Liu
CC: Andrew Cooper
CC: Jan Beulich
CC: Stefano Stabellini
CC: Konrad Wilk
CC: Tim Deegan
---
SUPPORT.md | 68
With the exception of driver domains, which depend on PCI passthrough,
and will be introduced later.
Signed-off-by: George Dunlap
Reviewed-by: Konrad Rzeszutek Wilk
---
Changes since v2:
- Reference XSA-77 as well under the XSM & FLASK section
CC: Ian Jackson
CC: Wei Liu
CC: Andrew Co
Signed-off-by: George Dunlap
---
Would someone be willing to take over this one?
CC: Ian Jackson
CC: Wei Liu
CC: Andrew Cooper
CC: Jan Beulich
CC: Stefano Stabellini
CC: Konrad Wilk
CC: Tim Deegan
CC: Roger Pau Monne
CC: Anthony Perard
CC: Paul Durrant
CC: Julien Grall
---
SUPPORT.md
x86-specific virtual hardware provided by the hypervisor, toolstack,
or QEMU.
Signed-off-by: George Dunlap
---
Changes since v2:
- Updated Nested PV / HVM sections
- Removed AVX section
- EFI -> OVMF
Changes since v1:
- Added emulated QEMU support, to replace docs/misc/qemu-xen-security.
N
Including host architecture support and guest types.
Signed-off-by: George Dunlap
---
Changes since v2:
- No Host ACPI listing for PVH dom0
- Add IOMMU entries for AMD and Intel
CC: Ian Jackson
CC: Wei Liu
CC: Andrew Cooper
CC: Jan Beulich
CC: Stefano Stabellini
CC: Konrad Wilk
CC: Tim
Signed-off-by: George Dunlap
---
Changes since v2:
- Update "non-pci passthrough" section
- Add DT / ACPI sections
CC: Ian Jackson
CC: Wei Liu
CC: Andrew Cooper
CC: Jan Beulich
CC: Stefano Stabellini
CC: Konrad Wilk
CC: Tim Deegan
CC: Julien Grall
---
SUPPO
Core memory management and scheduling.
Signed-off-by: George Dunlap
---
Changes since v2:
- s/Memory Ballooning/Dynamic memory control/;
- And add a description that mentions ballooning
CC: Ian Jackson
CC: Wei Liu
CC: Andrew Cooper
CC: Jan Beulich
CC: Tim Deegan
CC: Dario Faggioli
CC
Hardware support and guest type.
Signed-off-by: George Dunlap
---
Changes since v2:
- Moved SMMUv* into generic IOMMU section
CC: Ian Jackson
CC: Wei Liu
CC: Andrew Cooper
CC: Jan Beulich
CC: Stefano Stabellini
CC: Konrad Wilk
CC: Tim Deegan
CC: Julien Grall
---
SUPPORT.md | 25
Mostly PV protocols.
Signed-off-by: George Dunlap
---
Changes since v2:
- Define "having xl support" as a requirement for Tech Preview and Supported
- ...and remove backend from xl support section
- Add OpenBSD blkback
- Fix Linux backend names
- Remove non-existent implementation (PV
the basic framework.
Signed-off-by: Ian Jackson
Signed-off-by: George Dunlap
Acked-by: Jan Beulich
[1] http://rhodesmill.org/brandon/2012/one-sentence-per-line/
---
CC: Ian Jackson
CC: Wei Liu
CC: Andrew Cooper
CC: Jan Beulich
CC: Tim Deegan
CC: Dario Faggioli
CC: Tamas K Lengyel
CC:
For now only include xl-specific features, or interaction with the
system. Feature support matrix will be added when features are
mentioned.
Signed-off-by: George Dunlap
---
CC: Ian Jackson
CC: Wei Liu
CC: Andrew Cooper
CC: Jan Beulich
CC: Stefano Stabellini
CC: Konrad Wilk
CC: Tim Deegan
Superpage support and PVHVM.
Signed-off-by: George Dunlap
---
Changes since v2:
- Reworked superpage section
CC: Ian Jackson
CC: Wei Liu
CC: Andrew Cooper
CC: Jan Beulich
CC: Stefano Stabellini
CC: Konrad Wilk
CC: Tim Deegan
CC: Julien Grall
---
SUPPORT.md | 27
Signed-off-by: George Dunlap
---
Changes since v2:
- gdbsx -> not security suported
- Added host serial, host debug keys, and host sync_console entries
CC: Ian Jackson
CC: Wei Liu
CC: Andrew Cooper
CC: Jan Beulich
CC: Stefano Stabellini
CC: Konrad Wilk
CC: Tim Deegan
---
SUPPORT.md |
On 11/16/2017 03:43 PM, Julien Grall wrote:
> Hi George,
>
> On 13/11/17 15:41, George Dunlap wrote:
>> Signed-off-by: George Dunlap
>> ---
>> CC: Ian Jackson
>> CC: Wei Liu
>> CC: Andrew Cooper
>> CC: Jan Beulich
>> CC: Stefano Stabellini
> On Nov 21, 2017, at 9:26 AM, Jan Beulich wrote:
>
On 13.11.17 at 16:41, wrote:
>> +### Virtual CPUs
>> +
>> + Limit, x86 PV: 8192
>> + Limit-security, x86 PV: 32
>> + Limit, x86 HVM: 128
>> + Limit-security, x86 HVM: 32
>
> Personally I consider the "Limit-security" numbers t
On 11/21/2017 08:59 AM, Jan Beulich wrote:
On 13.11.17 at 16:41, wrote:
>> +### x86/PCI Device Passthrough
>> +
>> +Status: Supported, with caveats
>
> I think this wants to be
>
> ### PCI Device Passthrough
>
> Status, x86 HVM: Supported, with caveats
> Status, x86 PV: Support
On 11/14/2017 01:25 PM, Marek Marczykowski-Górecki wrote:
> On Mon, Nov 13, 2017 at 03:41:24PM +0000, George Dunlap wrote:
>> Signed-off-by: George Dunlap
>> ---
>> CC: Ian Jackson
>> CC: Wei Liu
>> CC: Andrew Cooper
>> CC: Jan Beulich
>> CC: Stefa
On 11/21/2017 07:55 PM, Andrew Cooper wrote:
> On 13/11/17 15:41, George Dunlap wrote:
>> Signed-off-by: George Dunlap
>> ---
>> CC: Ian Jackson
>> CC: Wei Liu
>> CC: Andrew Cooper
>> CC: Jan Beulich
>> CC: Stefano Stabellini
>> CC: Kon
On 11/21/2017 08:52 AM, Jan Beulich wrote:
>>>> On 13.11.17 at 16:41, wrote:
>> With the exception of driver domains, which depend on PCI passthrough,
>> and will be introduced later.
>>
>> Signed-off-by: George Dunlap
>
> Shouldn't we also ex
On 11/22/2017 11:15 AM, Jan Beulich wrote:
On 21.11.17 at 19:19, wrote:
>> xentrace I would argue for security support; I've asked customers to
>> send me xentrace data as part of analysis before. I also know enough
>> about it that I'm reasonably confident the risk of an attack vector is
>>
On 11/16/2017 03:41 PM, Julien Grall wrote:
> Hi George,
>
> On 13/11/17 15:41, George Dunlap wrote:
>> Signed-off-by: George Dunlap
>> ---
>> Do we need to add anything more here?
>>
>> And do we need to include ARM ACPI for guests?
>>
>> CC
On 11/22/2017 11:11 AM, Jan Beulich wrote:
On 21.11.17 at 19:02, wrote:
>> On 11/21/2017 08:39 AM, Jan Beulich wrote:
>> On 13.11.17 at 16:41, wrote:
+### x86/Nested PV
+
+Status, x86 HVM: Tech Preview
+
+This means running a Xen hypervisor inside an HVM doma
On 11/22/2017 11:05 AM, Jan Beulich wrote:
On 21.11.17 at 18:20, wrote:
>> On 11/21/2017 11:41 AM, Jan Beulich wrote:
>> On 21.11.17 at 11:56, wrote:
On 11/21/2017 08:29 AM, Jan Beulich wrote:
On 13.11.17 at 16:41, wrote:
>> +### PV USB support for xl
>> +
>> +
On 11/22/2017 11:11 AM, Jan Beulich wrote:
+### x86/HVM EFI
+
+Status: Supported
+
+Booting a guest via guest EFI firmware
>>>
>>> Shouldn't this say OVMF, to avoid covering possible other
>>> implementations?
>>
>> I don't expect that we'll ever need more than one EFI
On 11/22/2017 11:11 AM, Jan Beulich wrote:
On 21.11.17 at 19:02, wrote:
>> On 11/21/2017 08:39 AM, Jan Beulich wrote:
>> On 13.11.17 at 16:41, wrote:
+### x86/Nested PV
+
+Status, x86 HVM: Tech Preview
+
+This means running a Xen hypervisor inside an HVM doma
On 11/21/2017 07:21 PM, Andrew Cooper wrote:
> On 21/11/17 19:05, Ian Jackson wrote:
>> George Dunlap writes ("Re: [PATCH 10/16] SUPPORT.md: Add Debugging,
>> analysis, crash post-portem"):
>>> gdbsx security support: Someone may want to debug an untrusted guest,
On 11/21/2017 08:48 AM, Jan Beulich wrote:
On 13.11.17 at 16:41, wrote:
>> --- a/SUPPORT.md
>> +++ b/SUPPORT.md
>> @@ -152,6 +152,35 @@ Output of information in machine-parseable JSON format
>>
>> Status: Supported, Security support external
>>
>> +## Debugging, analysis, and crash p
On 11/21/2017 08:39 AM, Jan Beulich wrote:
On 13.11.17 at 16:41, wrote:
>> +### x86/Nested PV
>> +
>> +Status, x86 HVM: Tech Preview
>> +
>> +This means running a Xen hypervisor inside an HVM domain,
>> +with support for PV L2 guests only
>> +(i.e., hardware virtualization extensions not
On 11/21/2017 05:31 PM, Julien Grall wrote:
> Hi George,
>
> On 11/21/2017 04:43 PM, George Dunlap wrote:
>> On 11/16/2017 03:19 PM, Julien Grall wrote:
>>> On 13/11/17 15:41, George Dunlap wrote:
>>>> Signed-off-by: George Dunlap
>>>> ---
>>
On 11/21/2017 08:29 AM, Jan Beulich wrote:
>> +### QEMU backend hotplugging for xl
>> +
>> +Status: Supported
>
> Wouldn't this more appropriately be
>
> ### QEMU backend hotplugging
>
> Status, xl: Supported
You mean, for this whole section (i.e., everything here that says 'for
xl')?
On 11/21/2017 11:41 AM, Jan Beulich wrote:
On 21.11.17 at 11:56, wrote:
>> On 11/21/2017 08:29 AM, Jan Beulich wrote:
>> On 13.11.17 at 16:41, wrote:
+### PV USB support for xl
+
+Status: Supported
+
+### PV 9pfs support for xl
+
+Status: Tech P
On 11/21/2017 04:42 PM, Dario Faggioli wrote:
> On Tue, 2017-11-21 at 08:29 -0700, Jan Beulich wrote:
> On 21.11.17 at 15:07, wrote:
>>>
>> The question here is: In what other cases do we expect an RCU
>> callback to possibly touch guest state? I think the common use is
>> to merely free some
On 11/16/2017 03:19 PM, Julien Grall wrote:
> Hi George,
>
> On 13/11/17 15:41, George Dunlap wrote:
>> Superpage support and PVHVM.
>>
>> Signed-off-by: George Dunlap
>> ---
>> CC: Ian Jackson
>> CC: Wei Liu
>> CC: Andrew Cooper
>>
On 11/21/2017 01:22 PM, Jan Beulich wrote:
On 09.11.17 at 15:49, wrote:
>> See the code comment being added for why we need this.
>>
>> Reported-by: Igor Druzhinin
>> Signed-off-by: Jan Beulich
>
> I realize we aren't settled yet on where to put the sync call. The
> discussion appears to h
On Nov 21, 2017, at 11:37 AM, Jan Beulich
mailto:jbeul...@suse.com>> wrote:
On 21.11.17 at 11:45,
mailto:george.dun...@citrix.com>> wrote:
On 11/21/2017 08:11 AM, Jan Beulich wrote:
On 13.11.17 at 16:41,
mailto:george.dun...@citrix.com>> wrote:
+### ARM/SMMUv1
+
+Status: Supported
+
+###
On Nov 21, 2017, at 11:35 AM, Jan Beulich
mailto:jbeul...@suse.com>> wrote:
On 21.11.17 at 11:42,
mailto:george.dun...@citrix.com>> wrote:
On 11/21/2017 08:09 AM, Jan Beulich wrote:
On 13.11.17 at 16:41,
mailto:george.dun...@citrix.com>> wrote:
+### x86/PVH guest
+
+Status: Supported
+
+P
On 11/21/2017 08:29 AM, Jan Beulich wrote:
On 13.11.17 at 16:41, wrote:
>> +### PV USB support for xl
>> +
>> +Status: Supported
>> +
>> +### PV 9pfs support for xl
>> +
>> +Status: Tech Preview
>
> Why are these two being called out, but xl support for other device
> types isn't?
D
On 11/21/2017 08:11 AM, Jan Beulich wrote:
On 13.11.17 at 16:41, wrote:
>> +### ARM/SMMUv1
>> +
>> +Status: Supported
>> +
>> +### ARM/SMMUv2
>> +
>> +Status: Supported
>
> Do these belong here, when IOMMU isn't part of the corresponding
> x86 patch?
Since there was recently a time
On 11/21/2017 08:09 AM, Jan Beulich wrote:
On 13.11.17 at 16:41, wrote:
>> +### x86/PVH guest
>> +
>> +Status: Supported
>> +
>> +PVH is a next-generation paravirtualized mode
>> +designed to take advantage of hardware virtualization support when possible.
>> +During development this was
On 11/21/2017 08:03 AM, Jan Beulich wrote:
On 13.11.17 at 16:41, wrote:
>> --- a/SUPPORT.md
>> +++ b/SUPPORT.md
>> @@ -16,6 +16,65 @@ for the definitions of the support status levels etc.
>>
>> # Feature Support
>>
>> +## Memory Management
>> +
>> +### Memory Ballooning
>> +
>> +Stat
On 11/16/2017 03:19 PM, Julien Grall wrote:
> Hi George,
>
> On 13/11/17 15:41, George Dunlap wrote:
>> Superpage support and PVHVM.
>>
>> Signed-off-by: George Dunlap
>> ---
>> CC: Ian Jackson
>> CC: Wei Liu
>> CC: Andrew Cooper
>>
On 11/16/2017 01:04 PM, Jan Beulich wrote:
On 16.11.17 at 13:30, wrote:
>> On Thursday, 16 November 2017 8:30:39 PM AEDT Jan Beulich wrote:
>> On 15.11.17 at 23:48, wrote:
I am having trouble applying the patch 3 from XSA240 update 5 for xen
stable 4.8 and 4.9
xsa240 0003
On Nov 15, 2017, at 9:20 PM, Konrad Rzeszutek Wilk
wrote:
>
> On Thu, Nov 09, 2017 at 03:49:24PM +0530, Bhupinder Thakur wrote:
>>The console was not working on HP Moonshot (HPE Proliant Aarch64) because
>>the UART registers were accessed as 8-bit aligned addresses. However,
>>regist
Signed-off-by: George Dunlap
---
CC: Ian Jackson
CC: Wei Liu
CC: Andrew Cooper
CC: Jan Beulich
CC: Stefano Stabellini
CC: Konrad Wilk
CC: Tim Deegan
CC: Tamas K Lengyel
---
SUPPORT.md | 31 +++
1 file changed, 31 insertions(+)
diff --git a/SUPPORT.md b
Signed-off-by: George Dunlap
---
Could someone take this one over as well?
CC: Ian Jackson
CC: Wei Liu
CC: Andrew Cooper
CC: Jan Beulich
CC: Stefano Stabellini
CC: Konrad Wilk
CC: Tim Deegan
---
SUPPORT.md | 61 +
1 file changed
Signed-off-by: George Dunlap
---
Would someone be willing to take over this one?
CC: Ian Jackson
CC: Wei Liu
CC: Andrew Cooper
CC: Jan Beulich
CC: Stefano Stabellini
CC: Konrad Wilk
CC: Tim Deegan
CC: Roger Pau Monne
CC: Anthony Perard
CC: Paul Durrant
CC: Julien Grall
---
SUPPORT.md
Migration being one of the key 'non-easy' ones to be added later.
Signed-off-by: George Dunlap
---
CC: Ian Jackson
CC: Wei Liu
CC: Andrew Cooper
CC: Jan Beulich
CC: Stefano Stabellini
CC: Konrad Wilk
CC: Tim Deegan
---
SUPPORT.md | 16
1 file changed, 16
With the exception of driver domains, which depend on PCI passthrough,
and will be introduced later.
Signed-off-by: George Dunlap
---
CC: Ian Jackson
CC: Wei Liu
CC: Andrew Cooper
CC: Jan Beulich
CC: Stefano Stabellini
CC: Konrad Wilk
CC: Tim Deegan
CC: Tamas K Lengyel
CC: Rich Persaud
Signed-off-by: George Dunlap
---
CC: Ian Jackson
CC: Wei Liu
CC: Andrew Cooper
CC: Jan Beulich
CC: Stefano Stabellini
CC: Konrad Wilk
CC: Tim Deegan
CC: Rich Persaud
CC: Marek Marczykowski-Górecki
CC: Christopher Clark
CC: James McKenzie
---
SUPPORT.md | 33
On 11/13/2017 03:41 PM, George Dunlap wrote:
> Add a machine-readable file to describe what features are in what
> state of being 'supported', as well as information about how long this
> release will be supported, and so on.
>
> The document should be formatted using &q
Core memory management and scheduling.
Signed-off-by: George Dunlap
---
CC: Ian Jackson
CC: Wei Liu
CC: Andrew Cooper
CC: Jan Beulich
CC: Tim Deegan
CC: Dario Faggioli
CC: Nathan Studer
---
SUPPORT.md | 59 +++
1 file changed, 59
Mostly PV protocols.
Signed-off-by: George Dunlap
---
The xl side of this seems a bit incomplete: There are a number of
things supported but not mentioned (like networking, &c), and a number
of things not in xl (PV SCSI). Couldn't find evidence of pvcall or pv
keyboard support. Also w
For now only include xl-specific features, or interaction with the
system. Feature support matrix will be added when features are
mentioned.
Signed-off-by: George Dunlap
---
CC: Ian Jackson
CC: Wei Liu
CC: Andrew Cooper
CC: Jan Beulich
CC: Stefano Stabellini
CC: Konrad Wilk
CC: Tim Deegan
Hardware support and guest type.
Signed-off-by: George Dunlap
---
CC: Ian Jackson
CC: Wei Liu
CC: Andrew Cooper
CC: Jan Beulich
CC: Stefano Stabellini
CC: Konrad Wilk
CC: Tim Deegan
CC: Julien Grall
---
SUPPORT.md | 29 +
1 file changed, 29 insertions
the basic framework.
Signed-off-by: Ian Jackson
Signed-off-by: George Dunlap
[1] http://rhodesmill.org/brandon/2012/one-sentence-per-line/
---
CC: Ian Jackson
CC: Wei Liu
CC: Andrew Cooper
CC: Jan Beulich
CC: Tim Deegan
CC: Dario Faggioli
CC: Tamas K Lengyel
CC: Roger Pau Monne
CC: St
Superpage support and PVHVM.
Signed-off-by: George Dunlap
---
CC: Ian Jackson
CC: Wei Liu
CC: Andrew Cooper
CC: Jan Beulich
CC: Stefano Stabellini
CC: Konrad Wilk
CC: Tim Deegan
CC: Julien Grall
---
SUPPORT.md | 21 +
1 file changed, 21 insertions(+)
diff --git a
Signed-off-by: George Dunlap
---
CC: Ian Jackson
CC: Wei Liu
CC: Andrew Cooper
CC: Jan Beulich
CC: Stefano Stabellini
CC: Konrad Wilk
CC: Tim Deegan
---
SUPPORT.md | 29 +
1 file changed, 29 insertions(+)
diff --git a/SUPPORT.md b/SUPPORT.md
index 8235336c41
x86-specific virtual hardware provided by the hypervisor, toolstack,
or QEMU.
Signed-off-by: George Dunlap
---
Added emulated QEMU support, to replace docs/misc/qemu-xen-security.
Need to figure out what to do with the "backing storage image format"
section of that document.
CC: I
Signed-off-by: George Dunlap
---
Do we need to add anything more here?
And do we need to include ARM ACPI for guests?
CC: Ian Jackson
CC: Wei Liu
CC: Andrew Cooper
CC: Jan Beulich
CC: Stefano Stabellini
CC: Konrad Wilk
CC: Tim Deegan
CC: Julien Grall
---
SUPPORT.md | 10 ++
1
Including host architecture support and guest types.
Signed-off-by: George Dunlap
---
CC: Ian Jackson
CC: Wei Liu
CC: Andrew Cooper
CC: Jan Beulich
CC: Stefano Stabellini
CC: Konrad Wilk
CC: Tim Deegan
CC: Roger Pau Monne
---
SUPPORT.md | 53
On 11/03/2017 06:35 PM, Juergen Gross wrote:
> On 03/11/17 19:29, Roger Pau Monné wrote:
>> On Fri, Nov 03, 2017 at 05:57:52PM +0000, George Dunlap wrote:
>>> On 11/03/2017 02:52 PM, George Dunlap wrote:
>>>> On 11/03/2017 02:14 PM, Roger Pau Monné wrote:
>>&g
eclared in standard headers.
>>>>
>>>> As the pragma isn't available prior to gcc6, we need to invoke it
>>>> conditionally. Luckily up to gcc6 we haven't seen generated code access
>>>> SIMD registers beyond what our asm()s do.
>>>&g
On 11/06/2017 10:35 AM, Dario Faggioli wrote:
> As soft-affinity and caps will be available in Xen 4.10.
>
> Signed-off-by: Dario Faggioli
Reviewed-by: George Dunlap
___
Xen-devel mailing list
Xen-devel@lists.xen.org
https://lists.xen.org/xen-devel
On 11/03/2017 02:52 PM, George Dunlap wrote:
> On 11/03/2017 02:14 PM, Roger Pau Monné wrote:
>> On Thu, Nov 02, 2017 at 09:55:11AM +, Paul Durrant wrote:
>>> Hmm. I wonder whether the guest is actually healthy after the migrate. One
>>> could imagine a situati
On 11/03/2017 02:14 PM, Roger Pau Monné wrote:
> On Thu, Nov 02, 2017 at 09:55:11AM +, Paul Durrant wrote:
>>> -Original Message-
>>> From: Roger Pau Monne
>>> Sent: 02 November 2017 09:42
>>> To: Paul Durrant
>>> Cc: Ian Jackson ; Lars Kurth
>>> ; Wei Liu ; Julien Grall
>>> ; committ.
;> [Cc-list modified by removing someone and adding someone else]
>>>>
>>>> On Mon, 2017-09-25 at 16:10 -0700, Stefano Stabellini wrote:
>>>>> On Mon, 11 Sep 2017, George Dunlap wrote:
>>>>>> +### RTDS based Scheduler
>>>>>
On 11/01/2017 02:07 PM, Ian Jackson wrote:
> So, investigations (mostly by Roger, and also a bit of archaeology in
> the osstest db by me) have determined:
>
> * This bug is 100% reproducible on affected hosts. The repro is
> to boot the Windows guest, save/restore it, then migrate it,
> then
On 11/01/2017 05:10 PM, Konrad Rzeszutek Wilk wrote:
> On Tue, Oct 24, 2017 at 04:22:38PM +0100, George Dunlap wrote:
>> On Fri, Sep 15, 2017 at 3:51 PM, Konrad Rzeszutek Wilk
>> wrote:
>>>> +### Soft-reset for PV guests
>>>
>>> s/PV/HVM/
>>
&g
On 09/12/2017 08:52 PM, Stefano Stabellini wrote:
>>> +### Xen Framebuffer
>>> +
>>> +Status, Linux: Supported
>>
>> Frontend?
>
> Yes, please. If you write "Xen Framebuffer" I only take it to mean the
> protocol as should be documented somewhere under docs/. Then I read
> Linux, and I don't u
On 09/12/2017 11:39 AM, Roger Pau Monné wrote:
> On Mon, Sep 11, 2017 at 06:01:59PM +0100, George Dunlap wrote:
>> +## Toolstack
>> +
>> +### xl
>> +
>> +Status: Supported
>> +
>> +### Direct-boot kernel image format
>> +
>> +Sup
ERT_NOT_IN_ATOMIC on the return-to-guest
> path, had it not hit the check_lock() first.
>
> Call ASSERT_NOT_IN_ATOMIC() after each operation in the multicall, to make
> failures more obvious.
>
> Signed-off-by: Andrew Cooper
Reviewed-by: George Dunlap
___
On 10/31/2017 10:49 AM, Andrew Cooper wrote:
> If check_lock() triggers, a crash will occur. Instead of simply identifying
> "the irq context was different", indicate the expected and current irq
> context.
>
> Signed-off-by: Andrew Cooper
R
On 10/25/2017 04:27 PM, Wei Liu wrote:
> On Wed, Oct 25, 2017 at 04:25:21PM +0100, Ian Jackson wrote:
>> Wei Liu writes ("Re: [PATCH v2] scripts: introduce a script for build test"):
>>> On Tue, Oct 24, 2017 at 02:38:39PM +0100, Ian Jackson wrote:
Anthony PERARD writes ("Re: [PATCH v2] scripts
On Tue, Oct 24, 2017 at 12:42 PM, Andrew Cooper
wrote:
> On 24/10/17 11:27, George Dunlap wrote:
>> On 10/23/2017 06:55 PM, Andrew Cooper wrote:
>>> On 23/10/17 17:22, George Dunlap wrote:
>>>> On 09/11/2017 06:53 PM, Andrew Cooper wrote:
>>>&g
On Fri, Sep 15, 2017 at 3:51 PM, Konrad Rzeszutek Wilk
wrote:
>> +### Soft-reset for PV guests
>
> s/PV/HVM/
Is it? I thought this was for RHEL 5 PV guests to be able to do crash kernels.
>> +### Transcendent Memory
>> +
>> +Status: Experimental
>> +
>> +[XXX Add description]
>
> Guests wit
On Tue, Sep 12, 2017 at 4:35 PM, Rich Persaud wrote:
>> On Sep 11, 2017, at 13:01, George Dunlap wrote:
>>
>> +### XSM & FLASK
>> +
>> +Status: Experimental
>> +
>> +Compile time disabled
>> +
>> +### XSM & FLASK support for I
On 10/23/2017 06:55 PM, Andrew Cooper wrote:
> On 23/10/17 17:22, George Dunlap wrote:
>> On 09/11/2017 06:53 PM, Andrew Cooper wrote:
>>> On 11/09/17 18:01, George Dunlap wrote:
>>>> +### x86/RAM
>>>> +
>>>> +Limit, x86: 16TiB
>
On 10/23/2017 05:28 PM, Roger Pau Monne wrote:
> Recent changes in xenalyze introduced INT_MIN without also adding the
> required header, fix this by adding the header.
>
> Signed-off-by: Roger Pau Monné
Acked-by: George Dunlap
> ---
> Cc: George Dunlap
> Cc: Ian Jackson
On 09/11/2017 06:53 PM, Andrew Cooper wrote:
> On 11/09/17 18:01, George Dunlap wrote:
>> +### x86/PV
>> +
>> +Status: Supported
>> +
>> +Traditional Xen Project PV guest
>
> What's a "Xen Project" PV guest? Just Xen here.
>
> Als
On 10/20/2017 06:32 PM, Wei Liu wrote:
> Signed-off-by: Wei Liu
> ---
> Cc: Andrew Cooper
> Cc: George Dunlap
> Cc: Ian Jackson
> Cc: Jan Beulich
> Cc: Konrad Rzeszutek Wilk
> Cc: Stefano Stabellini
> Cc: Tim Deegan
> Cc: Wei Liu
> Cc: Julien Grall
>
On 10/18/2017 02:41 PM, Jan Beulich wrote:
On 18.10.17 at 12:51, wrote:
>> --- a/xen/arch/x86/Kconfig
>> +++ b/xen/arch/x86/Kconfig
>> @@ -37,6 +37,26 @@ source "arch/Kconfig"
>> config PV
>> def_bool y
>>
>> +config PV_LINEAR_PT
>> + bool "Support for PV linear pagetables"
>> +
On 10/12/2017 02:54 PM, Andrew Cooper wrote:
> Having all of this logic together makes it easier to follow Xen's virtual
> setup across the whole system.
>
> No functional change.
>
> Signed-off-by: Andrew Cooper
Reviewed-by: George Dunlap
> ---
> CC: Jan Be
lots.
>
> Signed-off-by: Andrew Cooper
Acked-by: George Dunlap
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7;ll just leave it there
and ASSERT that it's zero.
Reported-by: Jann Horn
Signed-off-by: George Dunlap
---
Changes since v1
- Remove stray blank lines added from previous patch
- Leave pg->linear_pt_count present, assert it's 0
- Rename variable to opt_pv_linear_pt
- Add sp
On 10/18/2017 10:39 AM, Jan Beulich wrote:
On 17.10.17 at 19:10, wrote:
>> --- a/docs/misc/xen-command-line.markdown
>> +++ b/docs/misc/xen-command-line.markdown
>> @@ -1422,6 +1422,22 @@ The following resources are available:
>> CDP, one COS will corespond two CBMs other than one with C
On 10/18/2017 10:39 AM, Jan Beulich wrote:
On 17.10.17 at 19:10, wrote:
>> --- a/docs/misc/xen-command-line.markdown
>> +++ b/docs/misc/xen-command-line.markdown
>> @@ -1422,6 +1422,22 @@ The following resources are available:
>> CDP, one COS will corespond two CBMs other than one with C
On 10/17/2017 07:05 PM, Andrew Cooper wrote:
> On 17/10/17 18:10, George Dunlap wrote:
>> Allowing pagetables to point to other pagetables of the same level
>> (often called 'linear pagetables') has been included in Xen since its
>> inception; but recently it has
are
allowed (default to 'true').
In order to make the code clean:
- Introduce LPT_ASSERT(), which only exists if CONFIG_PV_LINEAR_PT is defined
- Introduce zero_linear_entries() to set page->linear_pt_count to zero
(or do nothing, as appropriate)
Reported-by: Jann Horn
Signed-off-by:
On 10/17/2017 06:10 PM, George Dunlap wrote:
> Allowing pagetables to point to other pagetables of the same level
> (often called 'linear pagetables') has been included in Xen since its
> inception; but recently it has been the source of a number of subtle
> reference-countin
On 10/16/2017 01:32 PM, Jan Beulich wrote:
> Since the emulator acts on the live hardware registers, we need to
> prevent the compiler from using them e.g. for inlined memcpy() /
> memset() (as gcc7 does).
Why doesn't this affect the rest of the hypervisor too, since we don't
save and restore the
On 10/12/2017 04:38 PM, Jan Beulich wrote:
On 11.10.17 at 19:52, wrote:
>> The Intel manual claims that, "If [certain CPUID bits] are set, the
>> processor deprecates FCS and FDS, and the field is saved as h";
>> but experimentally it would be more accurate to say, "the field is
>> occasi
On 10/13/2017 11:31 AM, Jan Beulich wrote:
On 13.10.17 at 12:23, wrote:
>> On 10/13/2017 10:20 AM, Jan Beulich wrote:
>> On 13.10.17 at 11:10, wrote:
On 10/13/2017 10:06 AM, Jan Beulich wrote:
On 13.10.17 at 11:00, wrote:
>> --- a/tools/fuzz/x86_instruction_emulator/af
On 10/13/2017 10:20 AM, Jan Beulich wrote:
On 13.10.17 at 11:10, wrote:
>> On 10/13/2017 10:06 AM, Jan Beulich wrote:
>> On 13.10.17 at 11:00, wrote:
--- a/tools/fuzz/x86_instruction_emulator/afl-harness.c
+++ b/tools/fuzz/x86_instruction_emulator/afl-harness.c
@@ -99,13 +
On 10/13/2017 10:54 AM, Jan Beulich wrote:
On 13.10.17 at 11:22, wrote:
>> On 10/12/2017 04:16 PM, Jan Beulich wrote:
>> On 11.10.17 at 19:52, wrote:
@@ -761,12 +757,11 @@ static void disable_hooks(struct x86_emulate_ctxt
*ctxt)
static void sanitize_input(struct x86_emul
On 10/12/2017 04:24 PM, Jan Beulich wrote:
On 11.10.17 at 19:52, wrote:
>> @@ -884,20 +891,146 @@ int LLVMFuzzerInitialize(int *argc, char ***argv)
>> return 0;
>> }
>>
>> -int LLVMFuzzerTestOneInput(const uint8_t *data_p, size_t size)
>> +static void setup_fuzz_state(struct fuzz_stat
On 10/12/2017 04:16 PM, Jan Beulich wrote:
On 11.10.17 at 19:52, wrote:
>> --- a/tools/fuzz/x86_instruction_emulator/fuzz-emul.c
>> +++ b/tools/fuzz/x86_instruction_emulator/fuzz-emul.c
>> @@ -22,34 +22,31 @@
>>
>> #define SEG_NUM x86_seg_none
>>
>> -/* Layout of data expected as fuzzing
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