Hi Jan，
Yes, I mean with another patch. And Thank you again.
-Original Message-
From: Jan Beulich [mailto:jbeul...@suse.com]
Sent: Wednesday, April 18, 2018 6:52 PM
To: Fiona Li(BJ-RD)
Cc: xen-devel
Subject: RE: RE: [PATCH] x86/cpu: Support a new cpu vendor,which is Shanghai
>>> On 18.0
>>> On 18.04.18 at 12:25, wrote:
> [FionaLi] : I am sorry. I understood wrongly. The C000 range are
> extensions, which provide some additional feature different from Intel. As
> you suggested, we will enable those features in guest OSes and remove these
> code from patch. Can we support t
Jan
Thanks for your reply. Answer the following.
Best wish!
FionaLi
-Original Message-
From: Jan Beulich [mailto:jbeul...@suse.com]
Sent: Tuesday, April 10, 2018 2:35 PM
To: lifang...@126.com; Fiona Li(BJ-RD)
Cc: xen-devel@lists.xenproject.org
Subject: Re: RE: [PATCH] x86/cpu: Support a
>>> "Fiona Li(BJ-RD)" 04/10/18 3:08 AM >>>
>> +static void init_shanghai(struct cpuinfo_x86 *c) {
>> +uint64_t msr_ace,msr_rng;
>> +/* Test for Shanghai Extended CPUID information */
>> +if (cpuid_eax(0xC000) >= 0xC001) {
>> +/*Get Shanghai Extended function number */
>> +u32 extented_feat
Hi Jan,
Thanks for your reply. I want to give some explanation as follows.
-Original Message-
From: Jan Beulich [mailto:jbeul...@suse.com]
Sent: Friday, March 23, 2018 11:32 PM
To: Fionali
Cc: xen-devel@lists.xenproject.org; Fiona Li(BJ-RD)
Subject: Re: [PATCH] x86/cpu: Support a new cpu
/cpu: Support a new cpu vendor, which is
Shanghai. Shanghai cpu defines two msr registers to enable Random Number
Generator and Advanced Cryprography Engine.The cpu supports iommu, which is
designed according to Intel's speci...
On Fri, Mar 23, 2018 at 07:28:56PM +0800, Fionali wrote:
&
>>> On 23.03.18 at 12:28, wrote:
> From: FionaLi
>
> Signed-off-by: Fiona Li
First of all, please shorten the subject and put a fair part of what
you had there in the description.
Then you talk about a VT-d compatible IOMMU, but not about VMX
or some other CPU side hardware virtualization. Is
>>> On 23.03.18 at 13:41, wrote:
> On Fri, Mar 23, 2018 at 07:28:56PM +0800, Fionali wrote:
>> +/* Test for Shanghai Extended CPUID information */
>> +if (cpuid_eax(0xC000) >= 0xC001) {
>
> Coding style. Should be
>
> if ( )
> {
FAOD with the tab replaced by
On Fri, Mar 23, 2018 at 07:28:56PM +0800, Fionali wrote:
> From: FionaLi
>
> Signed-off-by: Fiona Li
> ---
> xen/arch/x86/cpu/Makefile | 1 +
> xen/arch/x86/cpu/common.c | 1 +
> xen/arch/x86/cpu/shanghai.c | 61
> +++
> xen/include/as
On Fri, Mar 23, 2018 at 07:28:56PM +0800, Fionali wrote:
> From: FionaLi
>
> Signed-off-by: Fiona Li
> ---
> xen/arch/x86/cpu/Makefile | 1 +
> xen/arch/x86/cpu/common.c | 1 +
> xen/arch/x86/cpu/shanghai.c | 61
> +++
> xen/include/as
From: FionaLi
Signed-off-by: Fiona Li
---
xen/arch/x86/cpu/Makefile | 1 +
xen/arch/x86/cpu/common.c | 1 +
xen/arch/x86/cpu/shanghai.c | 61 +++
xen/include/asm-x86/iommu.h | 2 ++
xen/include/asm-x86/msr-index.h | 4 +++
xen
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