flight 120351 seabios real [real]
http://logs.test-lab.xenproject.org/osstest/logs/120351/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-amd64-xl-qemuu-ws16-amd64 17 guest-stop fail REGR. vs. 115539
Tests which did not
flight 120360 rumprun real [real]
http://logs.test-lab.xenproject.org/osstest/logs/120360/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
build-i386-rumprun6 rumprun-buildfail REGR. vs. 106754
build-amd64-rumprun
flight 120336 xen-4.9-testing real [real]
http://logs.test-lab.xenproject.org/osstest/logs/120336/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-armhf-armhf-xl-xsm 6 xen-install fail REGR. vs. 12
On Fri, 9 Mar 2018, Julien Grall wrote:
> Furthermore, the workaround is not in Linux upstream and I doubt this will be
> accepted as it is. So I am not convinced that we should modify Xen interface
> for that.
>
> Anyway, given that your silicon is going to be respined, then you probably
> want
On Fri, 9 Mar 2018, Christian Lindig wrote:
On 9. Mar 2018, at 22:57, Michael Young wrote:
I have had a go at fixing the patch and my revised attempt is attached. I
suspect it could be tidied up, but it works for me.
Thank you for giving this another go. What is
4.9-stable review patch. If anyone has any objections, please let me know.
--
From: Juergen Gross
commit 71c208dd54ab971036d83ff6d9837bae4976e623 upstream.
Older Xen versions (4.5 and before) might have problems migrating pv
guests with MSR_IA32_SPEC_CTRL
> On 9. Mar 2018, at 22:57, Michael Young wrote:
>
> I have had a go at fixing the patch and my revised attempt is attached. I
> suspect it could be tidied up, but it works for me.
Thank you for giving this another go. What is the key difference to the
previous patch
On Mon, 12 Feb 2018, Wei Liu wrote:
On Fri, Feb 09, 2018 at 09:20:33AM +, Christian Lindig wrote:
On 8. Feb 2018, at 18:24, Wei Liu wrote:
Christian, do you have any idea when you can look into fixing the
safe-string patch?
Sorry, I can’t make a promise because
On 09/03/18 13:35, awokd wrote:
> On Fri, March 9, 2018 11:52 am, awokd wrote:
>
>> Xen on ARM might be a more reasonable starting point but I'm not sure
>> that would provide enough horsepower to drive a workstation
That's indeed an issue. There are ARM64 SoCs which are very capable and
could
flight 120338 linux-4.1 real [real]
http://logs.test-lab.xenproject.org/osstest/logs/120338/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
build-arm64-pvops 6 kernel-build fail REGR. vs. 118294
build-i386-pvops
Using superpages on the receiving dom0 will avoid performance regressions.
Olaf
TODO:
send 1G batches on HVM to help allocator on dst dom0
v11:
rebase to and for 4.11
v10:
coding style in xc_sr_bitmap API
reset bitmap size on free
check for empty bitmap in xc_sr_bitmap API
add comment to
Extend API for managing bitmaps. Each bitmap is now represented by a
generic struct xc_sr_bitmap.
Switch the existing populated_pfns to this API.
Signed-off-by: Olaf Hering
Acked-by: Wei Liu
---
tools/libxc/xc_sr_common.c | 41 +
The macros SUPERPAGE_2MB_SHIFT and SUPERPAGE_1GB_SHIFT will be used by
other code in libxc. Move the macros to a header file.
Signed-off-by: Olaf Hering
Acked-by: Wei Liu
---
tools/libxc/xc_dom_x86.c | 5 -
tools/libxc/xc_private.h | 5 +
2 files
flight 120372 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/120372/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-amd64-amd64-libvirt 13 migrate-support-checkfail never pass
test-arm64-arm64-xl-xsm
On 03/09/2018 01:41 PM, Andrew Cooper wrote:
On 09/03/2018 18:05, Boris Ostrovsky wrote:
On 02/26/2018 06:30 PM, Andrew Cooper wrote:
On 26/02/2018 19:44, Boris Ostrovsky wrote:
On 02/26/2018 02:12 PM, Andrew Cooper wrote:
On 20/02/18 11:58, Andrew Cooper wrote:
This rats nest was
On 03/09/2018 09:10 AM, Olaf Hering wrote:
Add an option to control when vTSC emulation will be activated for a
domU with tsc_mode=default. Without such option each TSC access from
domU will be emulated, which causes a significant perfomance drop for
workloads that make use of rdtsc.
Add a new
flight 120318 qemu-mainline real [real]
http://logs.test-lab.xenproject.org/osstest/logs/120318/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-amd64-qemuu-nested-intel 14 xen-boot/l1 fail REGR. vs. 120095
Hi,
On 05/03/18 16:04, Andre Przywara wrote:
At the moment we allocate exactly one page for struct vcpu on ARM, also
have a check in place to prevent it growing beyond 4KB.
As the struct includes the state of all 32 private (per-VCPU) interrupts,
we are at 3840 bytes on arm64 at the moment
Hi Andre,
On 05/03/18 16:04, Andre Przywara wrote:
Enable the VGIC operation by properly initialising the registers
in the hypervisor GIC interface.
This is based on Linux commit f7b6985cc3d0, written by Eric Auger.
Signed-off-by: Andre Przywara
Would you mind to
Linus,
Please git pull the following tag:
git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip.git
for-linus-4.16a-rc5-tag
xen: fix for V4.16-rc5
It contains just one fix for the correct error handling after a negative
rc from device_register().
Thanks.
Juergen
Hi Andre,
On 05/03/18 16:04, Andre Przywara wrote:
map_resources is the last initialization step needed before the first
VCPU is run. At that stage the code stores the MMIO base addresses used.
Also it registers the respective register frames with the MMIO framework.
This is based on Linux
Hi Andre,
On 05/03/18 16:04, Andre Przywara wrote:
This patch allocates and initializes the data structures used to model
the vgic distributor and virtual cpu interfaces. At that stage the
number of IRQs and number of virtual CPUs is frozen.
Implement the various functions that the Xen arch
Hi Andre,
On 05/03/18 16:04, Andre Przywara wrote:
The ARM arch code requires an interrupt controller emulation to implement
vgic_clear_pending_irqs(), although it is suspected that it is actually
not necessary. Go with a stub for now to make the linker happy.
The implementation of that
On 02/26/2018 06:30 PM, Andrew Cooper wrote:
On 26/02/2018 19:44, Boris Ostrovsky wrote:
On 02/26/2018 02:12 PM, Andrew Cooper wrote:
On 20/02/18 11:58, Andrew Cooper wrote:
This rats nest was discovered when finding that MSR_TSC_AUX leaked into PV
guests. It is RFC because I haven't done
On 09/03/18 16:29, Jan Beulich wrote:
On 05.03.18 at 10:50, wrote:
>> @@ -120,11 +121,24 @@ unsigned int flush_area_local(const void *va, unsigned
>> int flags)
>> else
>> {
>> u32 t = pre_flush();
>> -unsigned long cr4 =
s/fo/fo; while we're here.
Signed-off-by: George Dunlap
---
This is a candidate for backport to 4.10.
CC: Ian Jackson
CC: Wei Liu
CC: Andrew Cooper
CC: Jan Beulich
CC: Tim
All this information is now covered in SUPPORT.md.
Most of the emulated hardware is obvious a couple of the items are
worth pointing out specifically.
"xen_disk" is listed under "Blkback"
"...the PCI host bridge and the PIIX3 chipset...": This statement is
redundant -- the PCI host bridge is a
Hi Andre,
On 05/03/18 16:04, Andre Przywara wrote:
When a VCPU moves to another CPU, we need to adjust the target affinity
of any hardware mapped vIRQs, to observe our "physical-follows-virtual"
policy.
Implement arch_move_irqs() to adjust the physical affinity of all hardware
mapped vIRQs
On 05/03/18 16:04, Andre Przywara wrote:
The Xen arch code traps system registers writes from the guest and will
relay anything GIC related to the VGIC.
Since this affects only GICv3 (which we don't yet emulate), provide a
stub implementation of vgic_emulate() for now.
Signed-off-by: Andre
Hi Andre,
On 05/03/18 16:04, Andre Przywara wrote:
When we dump guest state on the Xen console, we also print the state of
IRQs that are on a VCPU.
Add the code to dump the state of an IRQ handled by the new VGIC.
Signed-off-by: Andre Przywara
Acked-by: Julien
Hi Andre,
On 05/03/18 16:04, Andre Przywara wrote:
To find an unused virtual IRQ number Xen uses a scheme to track used
virtual IRQs.
Implement this interface in the new VGIC to make the Xen core/arch code
happy.
This is actually somewhat VGIC agnostic, so is mostly a copy of the code
from the
Hey Juergen,
On Wed, 2018-02-28 at 09:23 +0100, Juergen Gross wrote:
> = Timeline =
>
> We now adopt a fixed cut-off date scheme. We will release twice a
> year. The upcoming 4.11 timeline are as followed:
>
> * Last posting date: March 16th, 2018
> * Hard code freeze: March 30th, 2018
> * RC1:
On 03/09/2018 04:55 PM, Olaf Hering wrote:
> The point was to document the counter part. Grep -w 1024 is not helpful.
Of course -- your patch certainly makes the codebase better by making
this number set in only one place, and in making it easier to find who
else is depending on this number with
Hi Andre,
On 05/03/18 16:04, Andre Przywara wrote:
The Xen core/arch code relies on two abstracted functions to inject an
event channel IRQ and to query its pending state.
Implement those to query the state of the new VGIC implementation.
The code looks good, but I am wondering why we ever
On Mon, Mar 05, 2018 at 07:41:54AM -0700, Jan Beulich wrote:
> >>> On 05.03.18 at 15:18, wrote:
> > On 02/03/18 15:34, Jan Beulich wrote:
> > On 21.02.18 at 15:02, wrote:
> >>> @@ -95,11 +101,18 @@ static unsigned int max_order(const struct domain
On Mon, Mar 05, 2018 at 07:38:36AM -0700, Jan Beulich wrote:
> >>> On 05.03.18 at 15:11, wrote:
> > On 05/03/18 14:00, Jan Beulich wrote:
> > On 05.03.18 at 14:43, wrote:
> >>> Anyway, I don't have much knowledge on the x86 to make the modification
Hi Andre,
On 05/03/18 16:04, Andre Przywara wrote:
The VGIC supports virtual IRQs to be connected to a hardware IRQ, so
when a guest EOIs the virtual interrupt, it affects the state of that
corresponding interrupt on the hardware side at the same time.
Implement the interface that the Xen
On Thu, Mar 08, 2018 at 12:52:31PM +, Igor Druzhinin wrote:
> This should help to avoid problems with accessing the device after
> migration/resume without PV drivers. Older systems will acquire
> the new record when migrated which should not change their state for
> worse.
>
> Signed-off-by:
On 09/03/18 17:00, Jan Beulich wrote:
On 09.03.18 at 14:18, wrote:
>> --- a/xen/arch/x86/domain.c
>> +++ b/xen/arch/x86/domain.c
>> @@ -426,8 +426,8 @@ static bool emulation_flags_ok(const struct domain *d,
>> uint32_t emflags)
>> return true;
>> }
>>
>>
flight 120340 ovmf real [real]
http://logs.test-lab.xenproject.org/osstest/logs/120340/
Perfect :-)
All tests in this flight passed as required
version targeted for testing:
ovmf 8b13bca9b81490fc0e42df25d5feb82bbb47833e
baseline version:
ovmf
On 09/03/18 16:49, George Dunlap wrote:
> On 03/09/2018 04:43 PM, Jan Beulich wrote:
> On 09.03.18 at 17:30, wrote:
>>> On 03/09/2018 04:25 PM, Jan Beulich wrote:
>>> On 09.03.18 at 17:17, wrote:
> --- a/xen/include/public/domctl.h
> +++
>>> On 09.03.18 at 14:18, wrote:
> --- a/xen/arch/x86/domain.c
> +++ b/xen/arch/x86/domain.c
> @@ -426,8 +426,8 @@ static bool emulation_flags_ok(const struct domain *d,
> uint32_t emflags)
> return true;
> }
>
> -int arch_domain_create(struct domain *d,
Thanks, George! This includes part of Intel features. Chao is working on a
complete list of patch series and their status for all Intel features.
Best Regards
John Ji
-Original Message-
From: dunl...@gmail.com [mailto:dunl...@gmail.com] On Behalf Of George Dunlap
Sent: Saturday,
The point was to document the counter part. Grep -w 1024 is not helpful.
Olaf___
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
On Fri, Feb 23, 2018 at 09:03:26PM +0100, Marek Marczykowski-Górecki wrote:
> On Fri, Feb 23, 2018 at 06:47:57PM +, Wei Liu wrote:
> > On Fri, Feb 09, 2018 at 12:14:03AM +0100, Marek Marczykowski-Górecki wrote:
> > > When fd=-1, no savefile will be written, but the domain will still be
> > >
>>> On 09.03.18 at 14:18, wrote:
> --- a/xen/arch/x86/domain.c
> +++ b/xen/arch/x86/domain.c
> @@ -430,20 +430,37 @@ int arch_domain_create(struct domain *d, unsigned int
> domcr_flags,
> struct xen_arch_domainconfig *config)
> {
> bool
On Tue, Jan 16, 2018 at 02:12:27AM +0800, Luwei Kang wrote:
> This patch add a flag to enable Intel PT (Intel processor trace).
> Default value is 1 (enabled).
>
> Signed-off-by: Luwei Kang
> ---
> docs/misc/xen-command-line.markdown | 7 +++
>
On 03/09/2018 04:43 PM, Jan Beulich wrote:
On 09.03.18 at 17:30, wrote:
>> On 03/09/2018 04:25 PM, Jan Beulich wrote:
>> On 09.03.18 at 17:17, wrote:
--- a/xen/include/public/domctl.h
+++ b/xen/include/public/domctl.h
@@ -137,6
>>> On 09.03.18 at 15:13, wrote:
> On Fri, Mar 09, 2018 at 01:18:39PM +, Andrew Cooper wrote:
>> Neither domcr_flags nor config are used on either side. Drop them, making
>> {hvm,pv}_domain_initialise() symmetric with all the other domain/vcpu
>> initialise/destroy
>>> On 09.03.18 at 15:16, wrote:
> Reviewed-by: Wei Liu
Acked-by: Jan Beulich
___
Xen-devel mailing list
Xen-devel@lists.xenproject.org
>>> On 09.03.18 at 15:12, wrote:
> On Fri, Mar 09, 2018 at 01:18:36PM +, Andrew Cooper wrote:
>> At the moment, there is a tight coupling between the domid and the use of
>> DOMCRF_dummy. Instead of using DOMCRF_dummy, base the one relevent decision
>> on domid alone.
>>
>>> On 09.03.18 at 17:30, wrote:
> On 03/09/2018 04:25 PM, Jan Beulich wrote:
> On 09.03.18 at 17:17, wrote:
>>> --- a/xen/include/public/domctl.h
>>> +++ b/xen/include/public/domctl.h
>>> @@ -137,6 +137,8 @@
From: Andre Przywara
So far our LR read/write functions do not handle the EOI bit and the
source CPUID bits in an LR, because the current VGIC implementation does
not use them.
Extend the gic_lr data structure to hold these bits of information by
using a union to
From: Julien Grall
hw_status can only be 1 or 0. So convert to a bool.
Signed-off-by: Julien Grall
---
xen/arch/arm/gic-v2.c | 9 +
xen/arch/arm/gic-v3.c | 8 +---
xen/include/asm-arm/gic.h | 2 +-
3 files changed, 11
From: Julien Grall
Mostly making the code nicer to read.
Signed-off-by: Julien Grall
---
xen/arch/arm/gic-v2.c | 15 +++
xen/arch/arm/gic-v3.c | 12 +---
xen/arch/arm/gic-vgic.c | 6 +++---
>>> On 09.03.18 at 17:23, wrote:
> --- a/xen/arch/x86/domctl.c
> +++ b/xen/arch/x86/domctl.c
> @@ -415,14 +415,13 @@ long arch_do_domctl(
>
> case XEN_DOMCTL_getpageframeinfo3:
> {
> -unsigned int num = domctl->u.getpageframeinfo3.num;
> +unsigned long
From: Julien Grall
The field pirq should only be valid when the virtual interrupt
is associated to a physical interrupt.
This change will help to extend gic_lr for supporting specific virtual
interrupt field (e.g eoi, source) that clashes with the PIRQ field.
From: Julien Grall
Hi all,
This series is meant to replace patch #21 "ARM: GICv2: extend LR read/write
functions to cover EOI and source" from Andre's vGIC series (see [1]).
It has some more clean-up to address potential shortcomings with the interface.
The series is
From: Julien Grall
Signed-off-by: Julien Grall
---
xen/arch/arm/gic-vgic.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/xen/arch/arm/gic-vgic.c b/xen/arch/arm/gic-vgic.c
index 61f093db50..e3cb47e80e 100644
---
From: Julien Grall
At the moment, write_lr is assuming the caller will set correctly the
group. However the group should always be 0 when the guest is using
vGICv2 and 1 for vGICv3. As the caller should not care about the group,
override it directly.
With that change,
On 03/09/2018 04:25 PM, Jan Beulich wrote:
On 09.03.18 at 17:17, wrote:
>> --- a/xen/include/public/domctl.h
>> +++ b/xen/include/public/domctl.h
>> @@ -137,6 +137,8 @@ DEFINE_XEN_GUEST_HANDLE(xen_domctl_getdomaininfo_t);
>> #define XEN_DOMCTL_PFINFO_BROKEN (0xdU<<28) /*
flight 120370 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/120370/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-amd64-amd64-libvirt 13 migrate-support-checkfail never pass
test-arm64-arm64-xl-xsm
>>> On 09.03.18 at 17:17, wrote:
> --- a/xen/include/public/domctl.h
> +++ b/xen/include/public/domctl.h
> @@ -137,6 +137,8 @@ DEFINE_XEN_GUEST_HANDLE(xen_domctl_getdomaininfo_t);
> #define XEN_DOMCTL_PFINFO_BROKEN (0xdU<<28) /* broken page */
> #define
The value of num is always the same as domctl->u.getpageframeinfo3.num,
it was assigned just a few lines before. Avoid truncation by making
num the same size as i, which is the only place where num is used.
Signed-off-by: Olaf Hering
---
xen/arch/x86/domctl.c | 5 ++---
1 file
I have folded in the comments so far and made a prototype v7 series,
which is here:
http://xenbits.xen.org/gitweb/?p=people/iwj/qemu.git;a=summary
https://xenbits.xen.org/git-http/people/iwj/qemu.git
git://xenbits.xen.org/people/iwj/qemu.git
In the branch
master..xen-restrict-v7.0
I
Ian Jackson writes ("Re: [PATCH 10/12] xen: Use newly added dmops for mapping
VGA memory"):
> Anthony PERARD writes ("Re: [PATCH 10/12] xen: Use newly added dmops for
> mapping VGA memory"):
> > This patch seems to remove the last users of
> > xen_xc_domain_add_to_physmap(). Can it be remove
On Fri, Mar 09, 2018 at 12:08:42PM +0100, Olaf Hering wrote:
> On Fri, Mar 09, Olaf Hering wrote:
>
> > abuild@latitude:~> readelf -Wa /usr/lib64/libpython2.7.so | grep dlsym
> > 003e5e08 00d90007 R_X86_64_JUMP_SLOT
> > dlsym@GLIBC_2.2.5 + 0
> >217:
Anthony PERARD writes ("Re: [PATCH 10/12] xen: Use newly added dmops for
mapping VGA memory"):
> This patch seems to remove the last users of
> xen_xc_domain_add_to_physmap(). Can it be remove from xen_common.h?
>
> With that:
> Acked-by: Anthony PERARD
Have added a
On Fri, Mar 09, Andrew Cooper wrote:
> On 09/03/18 16:01, Olaf Hering wrote:
> > The value of num is always the same as domctl->u.getpageframeinfo3.num,
> > it was assigned just a few lines before.
> >
> > Signed-off-by: Olaf Hering
>
> This isn't dead code. It is a truncation
On Fri, Mar 09, 2018 at 05:01:16PM +0100, Olaf Hering wrote:
> The value of num is always the same as domctl->u.getpageframeinfo3.num,
> it was assigned just a few lines before.
>
> Signed-off-by: Olaf Hering
It is still useful. The field in getpageframeinfo3 is
On 09/03/18 16:01, Olaf Hering wrote:
> The value of num is always the same as domctl->u.getpageframeinfo3.num,
> it was assigned just a few lines before.
>
> Signed-off-by: Olaf Hering
This isn't dead code. It is a truncation check.
~Andrew
> ---
> xen/arch/x86/domctl.c | 3
Ian Jackson writes ("Re: osstest planned outage consultation"):
> It turns out that another key member of staff is away then. We will
> have to do this some time in late April. Some time the [week] of the
> 16th-20th I think.
Lars, can you check this is OK with Credativ and then report back
The value of num is always the same as domctl->u.getpageframeinfo3.num,
it was assigned just a few lines before.
Signed-off-by: Olaf Hering
---
xen/arch/x86/domctl.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/xen/arch/x86/domctl.c
On Wed, Mar 7, 2018 at 4:26 PM, Lars Kurth wrote:
>
>
> On 07/03/2018, 17:02, "George Dunlap" wrote:
>
> >> * Title of series
> >>
> >> * Link to series (e.g. on
> https://lists.xenproject.org/archives/html/xen-devel,
> >>
On Thu, Mar 08, 2018 at 07:03:06PM +, Ian Jackson wrote:
> From: Ross Lagerwall
>
> Saving the current state to xenstore may fail when running restricted
> (in particular, after a migration). Therefore, don't report the error or
> exit when running restricted.
On Thu, Mar 08, 2018 at 07:03:05PM +, Ian Jackson wrote:
> From: Ross Lagerwall
>
> Xen unstable (to be in 4.11) has two new dmops, relocate_memory and
> pin_memory_cacheattr. Use these to set up the VGA memory, replacing the
> previous calls to libxc. This allows
On Fri, Mar 09, 2018 at 02:34:32AM -0700, Jan Beulich wrote:
> Offlining a CPU involves stopping the cpufreq governor. The on-demand
> governor will kill the timer before letting generic code proceed, but
> since that generally isn't happening on the subject CPU,
> cpufreq_dbs_timer_resume() may
On Fri, Mar 09, 2018 at 03:03:47PM +, Andrew Cooper wrote:
> c/s d1d6fc97d "x86/xpti: really hide almost all of Xen image" accidentially
> moved idt_table[] from .bss to .data by virtue of using the page_aligned
> section. We also have .bss.page_aligned, so use that.
>
> Signed-off-by:
>>> On 09.03.18 at 16:03, wrote:
> c/s d1d6fc97d "x86/xpti: really hide almost all of Xen image" accidentially
> moved idt_table[] from .bss to .data by virtue of using the page_aligned
> section. We also have .bss.page_aligned, so use that.
Oops.
> Signed-off-by:
>>> On 05.03.18 at 10:50, wrote:
> @@ -120,11 +121,24 @@ unsigned int flush_area_local(const void *va, unsigned
> int flags)
> else
> {
> u32 t = pre_flush();
> -unsigned long cr4 = read_cr4();
>
> -write_cr4(cr4 &
I recently made a build of xen 4.10.0 and installed it.
I have a pre-existing HVM guest that uses the following configuration:
1 hard drive using the phy disk backend. The guest also uses a device
model stubdomain. After upgrading, it refuses to start, due to a
stubdomain timeout:
Parsing
On Wed, Mar 07, 2018 at 03:44:22PM +, Lars Kurth wrote:
>
> A2) Long-term, Larger series
>
>
>
> Please call out any x86 related series, that need attention in the longer
> term.
> Provide
>
> * Title of series
>
> * Link to series (e.g. on
>
So far the number of list registers (LRs) a GIC implements is only
needed in the hardware facing side of the VGIC code (gic-vgic.c).
The new VGIC will need this information in more and multiple places, so
export a function that returns the number.
Signed-off-by: Andre Przywara
At the moment vgic_vcpu_inject_irq() is the interface for Xen internal
code and virtual devices to inject IRQs into a guest. This interface has
two shortcomings:
1) It requires a VCPU pointer, which we may not know (and don't need!)
for shared interrupts. A second function
On a GICv3 in non-compat mode the hypervisor interface is always
accessed via system registers. Those register names have a "ICH_" prefix
in the manual, to differentiate them from the MMIO registers. Also those
registers are mostly 64-bit (compared to the 32-bit GICv2 registers) and
use different
A GICv3 hardware implementation can be implemented in several parts that
communicate with each other (think multi-socket systems).
To make sure that critical settings have arrived at all endpoints, some
bits are tracked using the RWP bit in the GICD_CTLR register, which
signals whether a register
The GICv2 uses bitmaps spanning several MMIO registers for holding some
interrupt state. Similar to GICv3, add a poke helper functions to set a bit
for a given irq_desc in one of those bitmaps.
At the moment there is only one use in gic-v2.c, but there will be more
coming soon.
Signed-off-by:
Currently vgic.h both contains prototypes used by Xen arch code outside
of the actual VGIC (for instance vgic_vcpu_inject_irq()), and prototypes
for functions used by the VGIC internally.
Group them to later allow an easy split with one #ifdef.
Signed-off-by: Andre Przywara
The redistributor-stride property in a GICv3 DT node is only there to
cover broken platforms where this value deviates from the architected one.
Since we emulate the GICv3 distributor even for Dom0, we don't need to
copy the broken behaviour. All the special handling for Dom0s using
GICv3 is just
If we change something in a vCPU that affects its runnability or
otherwise needs the vCPU's attention, we might need to tell the scheduler
about it.
We are using this in one place (vIRQ injection) at the moment, but will
need this at more places soon.
So let's factor out this functionality, using
The two central functions to synchronise our emulated VGIC state with
the GIC hardware (the LRs, really), are named somewhat confusingly.
Rename them from gic_inject() to vgic_sync_to_lrs() and from
gic_clear_lrs() to vgic_sync_from_lrs(), to make the code more readable.
Signed-off-by: Andre
The bit definition for the CPUID mask in the GICv2 LR register was
wrong, fortunately the current implementation does not use that bit.
Fix it up (it's starting at bit 10, not bit 9) and clean up some
nearby definitions on the way.
This will be used by the new VGIC shortly.
Signed-off-by: Andre
The code to generate the DT node or MADT table for Dom0 reaches into the
domain's vGIC structure to learn the number of redistributor regions and
their base addresses.
Since those values are copied from the hardware, we can as well use
those hardware values directly when setting up the hardware
gic_event_needs_delivery() is not named very intuitively, especially
the gic_ prefix is somewhat misleading.
Rename it to vgic_pending_irq(), which makes it clear that this relates
to the virtual GIC and is about interrupts.
Signed-off-by: Andre Przywara
---
Changelog:
The last patch removed the usage of the hardware's redistributor-stride
value from our (Dom0) GICv3 emulation. This means we no longer need to
store this value in the VGIC data structure.
Remove that variable and every code snippet that handled that, instead
simply always use the architected
The prototype for gic_remove_from_lr_pending() is the last function in
gic.h which references a VGIC data structure.
Move it over to vgic.h, so that we can remove the inclusion of vgic.h
from gic.h. We add it to asm/domain.h instead, where it is actually
needed.
Signed-off-by: Andre Przywara
c/s d1d6fc97d "x86/xpti: really hide almost all of Xen image" accidentially
moved idt_table[] from .bss to .data by virtue of using the page_aligned
section. We also have .bss.page_aligned, so use that.
Signed-off-by: Andrew Cooper
---
CC: Jan Beulich
On Fri, Mar 09, 2018 at 01:18:42PM +, Andrew Cooper wrote:
> The share_xen_page_with_guest() functions are used by common code, and are
> implemented the same by each arch. Move the declarations into the common mm.h
> rather than duplicating them in each arch/mm.h
>
> Turn an int readonly
On Fri, Mar 09, 2018 at 01:18:41PM +, Andrew Cooper wrote:
> In future patches, the structure will be extended with further information,
> and this is far cleaner than adding extra parameters.
>
> One minor tweak is that the setting of guest_type needs to be deferred until
> config is
On Fri, Mar 09, 2018 at 01:18:40PM +, Andrew Cooper wrote:
> The only relevent initialisation for the idle domain is the context switch and
> poisoned pointers. Collect these bits together early in the function and exit
> when complete (although as a consequence, the e820 and vtsc lock
>
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