system.
Signed-off-by: Julien Grall
Reviewed-by: Andrii Anisov
---
Changes in v2:
- Add Andrii's reviewed-by
---
xen/arch/arm/arm32/head.S | 8
1 file changed, 8 deletions(-)
diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S
index 9f40face98..d42a1
The co-processor registers MAIR0 and MAIR1 are managed by EL1. So there
are no need to initialize them during Xen boot.
Signed-off-by: Julien Grall
Reviewed-by: Andrii Anisov
---
Changes in v2
- Add Andrii's reviewed-by
---
xen/arch/arm/arm32/head.S | 2 --
1 file chang
instructions before the write the
page-table entry.
Signed-off-by: Julien Grall
---
Changes in v2:
- Use 0x0 instead of 0
- Remove a duplicate mov r3, #0
---
xen/arch/arm/arm32/head.S | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/xen/arch/arm/arm32
Use the pattern BIT(..., UL) to make the code more readable. Note that
unsigned long is used instead of unsigned because SCTLR is technically
32-bit on Arm32 and 64-bit on Arm64.
Signed-off-by: Julien Grall
---
Changes in v2:
- Rework the patch to use BIT(..., UL) instead of _BITUL
. So it is pointless to zero the domheap again.
Signed-off-by: Julien Grall
Reviewed-by: Andrii Anisov
---
Changes in v2:
- Tweak a bit the commit message
- Add Andrii's reviewed-by
---
xen/arch/arm/mm.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/xen/arc
At the moment, the earlyprintk messages are interleaved with the
instructions. This makes more difficult to read the objdump output.
Introduce a new macro to add a string in .rodata.str and use it for all
the earlyprintk messages.
Signed-off-by: Julien Grall
Reviewed-by: Andrii Anisov
---
I
pretty hard to reach as page-tables are allocated
once and never released. Yet it is possible, so we need to protect with
a spinlock to avoid corrupting the page-tables.
Signed-off-by: Julien Grall
---
Changes in v2:
- Rework the commit message
---
xen/arch/arm/mm.c | 6 ++
1
So far, we don't have specific core initialization at boot. So remove
the comment.
Signed-off-by: Julien Grall
Reviewed-by: Andrii Anisov
---
Changes in v2:
- Fix typo in the commit message
- Add Andrii's reviewed-by
---
xen/arch/arm/arm64/head.S | 2 --
1 file
ff-by: Julien Grall
Reviewed-by: Andrii Anisov
---
Changes in v2:
- Add Andrii's reviewed-by
---
xen/arch/arm/mm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index eacc1647e0..b408de7c75 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arc
have been initialized, so we can get backtrace if an error
occurred.
Moving the initialization of the page-tables also avoid the dance to map
the FDT again in the new set of page-tables.
Signed-off-by: Julien Grall
Reviewed-by: Andrii Anisov
---
Changes in v2:
- Add Andrii
At the moment, set_fixmap may replace a valid entry without following
the break-before-make sequence. This may result to TLB conflict abort.
Rather than dealing with Break-Before-Make in set_fixmap, every call to
set_fixmap is paired with a call to clear_fixmap.
Signed-off-by: Julien Grall
easy to get out-of-sync with the definitions.
Signed-off-by: Julien Grall
---
Changes in v2:
- Use BIT(..., UL) instead of _BITUL
---
xen/arch/arm/arm32/head.S | 12 +
xen/arch/arm/arm64/head.S | 10 +---
xen/include/asm-arm/processor.h | 54
The page-table walker is configured to use the same shareability and
cacheability as the access performed when updating the page-tables. This
means cleaning the cache for secondary CPUs runtime page-tables is
unnecessary.
Signed-off-by: Julien Grall
Reviewed-by: Andrii Anisov
---
Changes
None of the parameters of secondary_start are actually used. So turn
secondary_start to a function with no parameters.
Also modify the assembly code to avoid setting-up the registers before
calling secondary_start.
Signed-off-by: Julien Grall
- Re-order the patch with "xen/arm: R
plied based
on staging:
git://xenbits.xen.org/people/julieng/xen-unstable.git branch mm/part2/v2
Cheers,
[1] https://lists.xenproject.org/archives/html/xen-devel/2019-05/msg01109.html
Julien Grall (19):
xen/const: Extend the existing macro BIT to take a suffix in parameter
xen/arm: Rename S
system.
Signed-off-by: Julien Grall
Reviewed-by: Andrii Anisov
---
Changes in v2:
- Add Andrii's reviewed-by
---
xen/arch/arm/arm64/head.S | 6 --
1 file changed, 6 deletions(-)
diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S
index b957eb90fb..08094
to be used).
Signed-off-by: Julien Grall
Reviewed-by: Andrii Anisov
---
Changes in v2:
- Fix build on arm32
- Add Andrii's reviewed-by
---
xen/arch/arm/arm32/head.S | 5 +++--
xen/arch/arm/arm64/head.S | 4 ++--
xen/arch/arm/guest_walk.c | 2 +-
xen
introduced
and now used to define static page-tables.
Note that DEFINE_PAGE_TABLES() alignment differs from what is currently
used for allocating page-tables. This is fine because page-tables are
only required to be aligned to a page-size.
Signed-off-by: Julien Grall
---
Changes in v2
e
used by anyone in Xen and also avoid to include bitops.h in assembly
code.
Signed-off-by: Julien Grall
---
Changes in v2:
- Replace "xen/const: Introduce _BITUL and _BITULL"
---
xen/arch/arm/arm32/insn.c | 2 +-
xen/arch/arm/arm64/insn.c | 18 +---
increment an invalid MFN.
Signed-off-by: Julien Grall
Reviewed-by: Andrii Anisov
---
Changes in v2:
- Move the patch earlier on in the series
- Add Andrii's reviewed-by
---
xen/arch/arm/mm.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/xen/arch/arm
{set, clear}_fixmap() are currently open-coding update to the Xen
page-tables. This can be avoided by using the generic helpers
map_pages_to_xen() and destroy_xen_mappings().
Both function are not meant to fail for fixmap, hence the BUG_ON()
checking the return.
Signed-off-by: Julien Grall
The enum xenmap_operation is not used anymore. So remove it.
Signed-off-by: Julien Grall
Reviewed-by: Andrii Anisov
---
Changes in v2:
- Add Andrii's reviewed-by
---
xen/arch/arm/mm.c | 24
1 file changed, 8 insertions(+), 16 deletions(-)
diff --git
There are few places requiring to generate offsets from an address.
Rather than open-coding everywhere, we can introduce a macro to do the
job for us.
Signed-off-by: Julien Grall
Reviewed-by: Andrii Anisov
---
Changes in v2:
- Add Andrii's reviewed-by
---
xen/arch/arm/
relience on xenmap_operation:
- _PAGE_PRESENT: Indicate whether we are adding/removing the mapping
- _PAGE_POPULATE: Indicate whether we only populate page-tables
Signed-off-by: Julien Grall
Reviewed-by: Andrii Anisov
---
Changes in v2:
- Add Andrii's reviewed-by
---
xen
-by: Julien Grall
Reviewed-by: Andrii Anisov
---
Changes in v2:
- Correctly detect the removal of a page
- Fix ASSERT on flags in the else case
- Add Andrii's reviewed-by
---
xen/arch/arm/mm.c | 115 +-
1 file ch
In preparation of rework of the Xen PT, the logic to update an entry
in moved out in a separate function.
Signed-off-by: Julien Grall
Reviewed-by: Andrii Anisov
---
Changes in v2:
- Add Andrii's reviewed-by
---
xen/arch/arm/mm.c
lieng/xen-unstable.git branch mm/part3/v2
Cheers,
[1] https://lists.xenproject.org/archives/html/xen-devel/2019-05/msg01109.html
[2] https://lists.xenproject.org/archives/html/xen-devel/2019-05/msg01149.html
Julien Grall (12):
xen/arm: lpae: Add a macro to generate offsets from an address
xe
}map_domain_page().
While on arm32 this means an extra mapping in the normal cases, this is not
very important as xen page-tables are not updated often.
In order to allow future change in the way Xen page-tables are mapped,
two new helpers are introduced to map/unmap the page-tables.
Signed-off-by: Julien
create_xen_entries() is doing more than creating entries. It can also
modify and remove entries.
Rename the function to make clear what the function is actually doing.
Signed-off-by: Julien Grall
Reviewed-by: Andrii Anisov
---
Changes in v2:
- Add Andrii's reviewed-by
---
from arch/arm/p2m.c and contain some
limitations for the time being:
- Superpage cannot be shattered
- Only level 3 (i.e 4KB) can be done
Note that the parameter 'addr' has been renamed to 'virt' to make clear
we are dealing with a virtual address.
Signed-off-by: Julie
set_pte_flags_on_range() is yet another function that will open-code
update to a specific range in the Xen page-tables. It can be completely
dropped by using either modify_xen_mappings() or destroy_xen_mappings().
Signed-off-by: Julien Grall
Reviewed-by: Andrii Anisov
---
Changes in v2
With the newly introduced flags, it is now possible to know how the page
will be updated through the flags.
All the use of xenmap_operation are now replaced with the flags. At the
same time, validity check are now removed as they are gathered in
xen_pt_check_entry().
Signed-off-by: Julien Grall
dress
could be excluded more easily.
2) should not be too difficult to implement. It is just a matter of clean-up
whatever was used previous before registering the new interface.
Cheers,
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Hi,
On 5/14/19 5:19 PM, Paul Durrant wrote:
-Original Message-
From: Jan Beulich [mailto:jbeul...@suse.com]
Sent: 13 May 2019 09:11
To: Paul Durrant
Cc: Brian Woods ; Suravee Suthikulpanit
; Julien
Grall ; Andrew Cooper ; Roger
Pau Monne
; Wei Liu ; Kevin Tian
; Stefano
Stabellini
Hi Andrii,
On 15/05/2019 10:04, Andrii Anisov wrote:
On 14.05.19 16:49, Julien Grall wrote:
You have to keep in mind that existing OS have to run on newer Xen without any
modification.
As I just written to Jan, it is one more reason to keep those interfaces living
in parallel and do not
d
a series with that fixed later today.
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#ifdef.
So I assume it is part of the stable ABI. Am I correct?
Do you have any suggestion how this could safely be extended?
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the Thumb instructions. So replace the BUG_ON() by a proper
check.
Reported-by: Lukas Jünger
Signed-off-by: Julien Grall
---
This patch needs to be backported as far as possible. Otherwise Xen
would not be able to run on processor implementing ARMv8.0-SSBS,
ARMv8.5-BTI or ARMv8.5
; $@
>> So we need to tell the top Makefile to filter out libfdt.
>>
>> Reported-by: Viktor Mitin
>> Signed-off-by: Julien Grall
>> Tested-by: Viktor Mitin
>
> Reviewed-by: Wei Liu
>
> Although I would like to ask you to adjust the subject to be more
> specific
The lock can be completely removed anyway. See my previous comments.
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On 16/05/2019 14:17, Andre Przywara wrote:
On Thu, 16 May 2019 17:15:36 +0530
Amit Tomer wrote:
On Thu, May 16, 2019 at 12:25 AM Oleksandr wrote:
On 03.05.19 20:02, Amit Singh Tomar wrote:
Suggested-by: Julien Grall
Signed-off-by: Amit Singh Tomar
---
* This replaces following
Hi Andrii,
On 16/05/2019 15:25, Andrii Anisov wrote:
Hello Julien,
On 16.05.19 16:48, Julien Grall wrote:
The lock can be completely removed anyway. See my previous comments.
You suggested kinda simplified try_lock with runstate update skipping in case of
fail.
The question here is if we
Hi,
On 08/05/2019 17:34, Julien Grall wrote:
On 08/05/2019 17:30, Oleksandr wrote:
On 08.05.19 19:19, Julien Grall wrote:
Hi Oleksandr,
Hi Julien
On 02/05/2019 18:00, Oleksandr Tyshchenko wrote:
Oleksandr Tyshchenko (4):
xen/arm: drivers: scif: Extend driver to handle other
e the correspondent check in schedule_tail()
with ASSERT() which is the development (debug) build guard.
Signed-off-by: Andrii Anisov
FWIW,
Reviewed-by: Dario Faggioli
Acked-by: Julien Grall
I have now committed the patch.
Cheers,
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__
is
is a latent bug.
As the two libraries can only be used at boot, it is fine to disable coverage
for the entire library.
"
Reported-by: Viktor Mitin
Suggested-by: Julien Grall
Signed-off-by: Viktor Mitin
Acked-by: Andrew Cooper
Reviewed-by: Wei Liu
Reviewed-by tag mean the perso
I can't provide more input without a proper investigation.
I don't believe a few more patch on top of qemu-xen would.
Cheers,
[1]
http://logs.test-lab.xenproject.org/osstest/logs/136231/test-arm64-arm64-xl/info.html
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Hi Andrew & Jan,
On 5/16/19 8:58 AM, Jan Beulich wrote:
On 15.05.19 at 22:12, wrote:
On 15/05/2019 20:58, Julien Grall wrote:
Hi all,
It looks like the structures vcpu_guest_core_regs and
vcpu_guest_context does not correctly reflect the AArch64 state. For
instance, all Arm64 sy
heers,
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Hi,
On 5/17/19 6:23 PM, Anthony PERARD wrote:
On Thu, May 16, 2019 at 10:38:54PM +0100, Julien Grall wrote:
Hi Anthony,
Thank you for CCing me.
On 5/16/19 11:37 AM, Anthony PERARD wrote:
On Wed, May 15, 2019 at 07:48:17PM +, osstest service owner wrote:
flight 136184 qemu-upstream-4.11
en the top left 17 bits are all zero or are all one
return ((!(vaddr >> 47)) || (((vaddr >> 47)&0x1) == 0x1))
Agree?
Thanks
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Hi Alistair,
On 17/05/2019 23:01, Alistair Francis wrote:
On Fri, May 17, 2019 at 1:46 AM Julien Grall wrote:
On 16/05/2019 20:30, Alistair Francis wrote:
On Thu, May 16, 2019 at 3:32 AM Jan Beulich wrote:
On 16.05.19 at 02:02, wrote:
Make the asm/vpl011.h dependent on the ARM
On 17/05/2019 07:47, Viktor Mitin wrote:
On Thu, May 16, 2019 at 06:40:14PM +0100, Julien Grall wrote:
No need to resend the patch, I can do the modification when I will commit the
patch.
Hi Julien,
Hi,
Thank you for detailed description provided.
Will take into consideration all
port from?
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to_cpup(intspec), intlen);
-/* Get the reg property (if any) */
- addr = dt_get_property(device, "reg", NULL);
-
/* Look for the interrupt parent. */
p = dt_irq_find_parent(device);
if ( p == NULL )
Cheers,
[1] linux/Documentation/devicetree/bindings/interrupt-controller
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esend the updated patch.
No need to resend it. I will commit it with the updates I mentioned in my
e-mail.
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y Xen.
It is meant to be used as a base for tailoring your platform where all the
options are turned off by default.
So I think offering a direct access is likely going to be misused in most of the
cases without proper documentation.
Cheers,
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Hi,
On 20/05/2019 14:41, Volodymyr Babchuk wrote:
Julien Grall writes:
Hi,
First of all, please add a cover letter when you send a series. This
help for threading and also a place to commend on general feedback.
Oh, okay. That was quite simple change and I didn't wanted to spam with
t is a
gzip, but it is actually a plain text.
Cheers,
[1]
http://logs.test-lab.xenproject.org/osstest/logs/136385/test-armhf-armhf-xl-credit2/cubietruck-gleizes---var-log-xen-console-guest-debian.guest.osstest.log.gz
Ian.
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On 20/05/2019 14:48, Oleksandr wrote:
On 20.05.19 14:03, Julien Grall wrote:
Hi,
Hi, Julien
On 02/05/2019 15:13, Oleksandr Tyshchenko wrote:
From: Oleksandr Tyshchenko
Port Linux helper of_count_phandle_with_args for counting
number of phandles in a property.
Linux 5.1 uses a
Hi,
On 10/05/2019 14:25, Julien Grall wrote:
On 10/05/2019 14:24, Jan Beulich wrote:
On 10.05.19 at 15:02, wrote:
On 10/05/2019 12:35, Jan Beulich wrote:
On 07.05.19 at 17:14, wrote:
--- a/xen/arch/x86/mm/shadow/common.c
+++ b/xen/arch/x86/mm/shadow/common.c
@@ -474,7 +474,8
Hi Stefano,
On 17/04/2019 18:27, Stefano Stabellini wrote:
On Wed, 17 Apr 2019, Julien Grall wrote:
Hi,
On 17/04/2019 18:12, Stefano Stabellini wrote:
On Tue, 16 Apr 2019, Julien Grall wrote:
Hi Stefano,
On 4/16/19 10:51 PM, Stefano Stabellini wrote:
On Mon, 28 Jan 2019, Julien Grall
On 20/05/2019 17:10, Oleksandr wrote:
On 20.05.19 15:25, Julien Grall wrote:
Hi,
Hi, Julien.
On 02/05/2019 15:13, Oleksandr Tyshchenko wrote:
From: Oleksandr Tyshchenko
Xen expects to see "interrupts" property when parsing host
device-tree. But, there are cases when s
but the
code is only protected with the second part.
How about:
#endif
#ifdef CONFIG_SBSA_VUART_CONSOLE
...
#endif
?
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some headache by only declaring the structure for Xen and tools.
Suggested-by: Andrew Cooper
Signed-off-by: Julien Grall
---
This is a follow-up of the discussion [1].
As this is now Xen and tools only, I am wondering whether the check on
GNU_C is still necessary. I am happy to send a
Hi,
On 20/05/2019 19:56, Stefano Stabellini wrote:
> On Tue, 14 May 2019, Julien Grall wrote:
>> The AIVIVT is a type of instruction cache available on Armv7. This is
>> the only cache not implementing the IVIPT extension and therefore
>> requiring specific care.
>>
On 20/05/2019 22:01, Stefano Stabellini wrote:
> On Fri, 10 May 2019, Julien Grall wrote:
>> Feel free to suggest an in-code comment so we can discuss on the worthiness.
>
> I suggest something like the following:
>
> /*
>* Flush all hypervisor mappings f
Hi Stefano,
On 20/05/2019 22:26, Stefano Stabellini wrote:
> On Sat, 11 May 2019, Julien Grall wrote:
>>>>> But I am still not happy with the approach taken for the reserved-memory
>>>>> regions in this series. As I pointed out before, they are just normal
>>
diff. So it makes quite difficult to understand the purpose of
the patch.
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he purpose of
the patch.
Well, as said - you're the maintainer. I wouldn't be bothered overly
much by a strange diff that might result.
I will wait on Stefano's input.
Cheers,
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Hi,
On 5/20/19 11:56 PM, Stefano Stabellini wrote:
On Tue, 14 May 2019, Julien Grall wrote:
The current value of HSCTLR_BASE for Arm64 is pretty wrong. It would
actually turn on SCTLR_EL2.nAA (bit 6) on hardware implementing
ARMv8.4-LSE.
Furthermore, the documentation of what is cleared/set
Hi Stefano,
On 5/20/19 10:04 PM, Stefano Stabellini wrote:
On Mon, 20 May 2019, Julien Grall wrote:
On 17/04/2019 18:27, Stefano Stabellini wrote:
On Wed, 17 Apr 2019, Julien Grall wrote:
Hi,
On 17/04/2019 18:12, Stefano Stabellini wrote:
On Tue, 16 Apr 2019, Julien Grall wrote:
Hi
Commit 03957f58db "xen/const: Extend the existing macro BIT to take a
suffix in parameter" didn't convert all the callers of the macro BIT.
This will result to a build breakage when enabling Livepatch on arm64.
Reported-by: Andrew Cooper
Signed-off-by: Julien Grall
---
xen
On 5/21/19 4:36 PM, Stefano Stabellini wrote:
On Tue, 21 May 2019, Julien Grall wrote:
Commit 03957f58db "xen/const: Extend the existing macro BIT to take a
suffix in parameter" didn't convert all the callers of the macro BIT.
This will result to a build breakage when enabli
Hi,
Answering to myself.
On 5/17/19 8:00 PM, Julien Grall wrote:
Hi,
On 5/17/19 6:23 PM, Anthony PERARD wrote:
On Thu, May 16, 2019 at 10:38:54PM +0100, Julien Grall wrote:
Hi Anthony,
Thank you for CCing me.
On 5/16/19 11:37 AM, Anthony PERARD wrote:
On Wed, May 15, 2019 at 07:48:17PM
Hi Ian,
On 5/20/19 5:04 PM, Ian Jackson wrote:
Julien Grall writes ("Re: [xen-4.11-testing test] 136385: regressions - FAIL"):
Before the last 2 flights, the kernel was compiled natively. Now it is
cross-compiled on x86 machine. So there are a difference in the way the kernel
is bui
s modified.
I don't think it is sensible to expect users to know when to strip the list...
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guess your will on MAINTAINERS. You
should update the documentation/script if this is the expectation you have.
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On 21/05/2019 10:55, Julien Grall wrote:
Hi Jan,
On 5/21/19 10:43 AM, Jan Beulich wrote:
On 21.05.19 at 11:35, wrote:
On 5/21/19 10:26 AM, Jan Beulich wrote:
On 20.05.19 at 20:12, wrote:
As this is now Xen and tools only, I am wondering whether the check on
GNU_C is still
(+Artem)
Hi Jan,
On 22/05/2019 13:29, Jan Beulich wrote:
On 22.05.19 at 14:20, wrote:
On 21/05/2019 10:55, Julien Grall wrote:
Hi Jan,
On 5/21/19 10:43 AM, Jan Beulich wrote:
On 21.05.19 at 11:35, wrote:
On 5/21/19 10:26 AM, Jan Beulich wrote:
On 20.05.19 at 20:12, wrote
Hi,
Answering to myself.
On 10/05/2019 15:34, Julien Grall wrote:
On 10/05/2019 15:19, Jan Beulich wrote:
On 10.05.19 at 16:04, wrote:
On 10/05/2019 14:45, Jan Beulich wrote:
On 10.05.19 at 15:41, wrote:
The point here, we keep within the hypervisor the idea of what's valid or
in
= 0;
- } else
+ } else if (!pre_initialized)
rc = swiotlb_late_init_with_tbl(xen_io_tlb_start,
xen_io_tlb_nslabs);
if (!rc)
Cheers,
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Hi Jan,
Thank you for the feedback.
On 5/23/19 9:27 AM, Jan Beulich wrote:
On 24.04.19 at 12:47, wrote:
On 24/04/2019 01:20, Stefano Stabellini wrote:
On Mon, 22 Apr 2019, Julien Grall wrote:
This code is pretty nasty, but I haven't found a better way for avoiding
to check if CONFIG_
tagged "V3" is the original version where
as RFC 2 and RFC 3 are variants. Am I correct?
If so, for next time, I would recommend to have the cover letter first and then
all the patches send "In-Reply-To" the cover letter. This makes easier to track
seri
On 28/05/2019 10:17, Andrii Anisov wrote:
Hello Julien,
On 28.05.19 11:59, Julien Grall wrote:
I am not answering on the content yet, I will do that separately. The
threading for this series looks quite confusing. The head of the thread is
this patch (i.e RFC 2) but then you have a cover
Hi Volodymyr,
Sorry for the late reply.
On 5/20/19 3:57 PM, Volodymyr Babchuk wrote:
Julien Grall writes:
Hi,
On 20/05/2019 14:41, Volodymyr Babchuk wrote:
Julien Grall writes:
Hi,
First of all, please add a cover letter when you send a series. This
help for threading and also a place
);
-local_irq_disable();
}
else if ( is_lpi(irq) )
{
-local_irq_enable();
isb();
gic_hw_ops->do_LPI(irq);
-local_irq_disable();
}
else if ( unlikely(irq < 16) )
{
Cheer
Hi George,
On 28/05/2019 18:29, George Dunlap wrote:
On 5/20/19 4:13 PM, Julien Grall wrote:
Hi,
On 10/05/2019 14:25, Julien Grall wrote:
On 10/05/2019 14:24, Jan Beulich wrote:
On 10.05.19 at 15:02, wrote:
On 10/05/2019 12:35, Jan Beulich wrote:
On 07.05.19 at 17:14, wrote:
--- a
Hi Volodymyr,
On 29/05/2019 12:40, Volodymyr Babchuk wrote:
On 20/05/2019 14:41, Volodymyr Babchuk wrote:
Julien Grall writes:
If you read my previous e-mail, I didn't completely reject the
approach in my previous e-mail. I pointed out that the user may be
misled of the name and
On 29/05/2019 11:31, Andrii Anisov wrote:
Hello Julien,
Hi,
On 28.05.19 20:07, Julien Grall wrote:
Title: Interrupts are still unmasked when executing action for interrupt
routed to Xen. So you need to be more specific. How about
"xen/arm: gic: Defer the decision to unmask interrup
.
Only the P2M_PRINTK version should be kept, am I right?
I'll leave it to Julien to decide if he wants to clean this up or leave
it be.
I am happy to write a patch to remove the duplicated message.
Cheers,
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Gentle ping.
On 20/05/2019 20:53, Julien Grall wrote:
Hi,
On 20/05/2019 19:56, Stefano Stabellini wrote:
On Tue, 14 May 2019, Julien Grall wrote:
The AIVIVT is a type of instruction cache available on Armv7. This is
the only cache not implementing the IVIPT extension and therefore
requiring
Gentle ping
On 14/05/2019 13:11, Julien Grall wrote:
Now that we dropped flush_xen_text_tlb_local(), we have only one set of
helpers acting on Xen TLBs. There naming are quite confusing because the
TLB instructions used will act on both Data and Instruction TLBs.
Take the opportunity to rework
Ping, it would be good to know which bits I dropped...
On 21/05/2019 11:09, Julien Grall wrote:
Hi,
On 5/20/19 11:56 PM, Stefano Stabellini wrote:
On Tue, 14 May 2019, Julien Grall wrote:
The current value of HSCTLR_BASE for Arm64 is pretty wrong. It would
actually turn on SCTLR_EL2.nAA (bit
Hi,
On 20/05/2019 23:56, Stefano Stabellini wrote:
On Tue, 14 May 2019, Julien Grall wrote:
None of the parameters of secondary_start are actually used. So turn
secondary_start to a function with no parameters.
Also modify the assembly code to avoid setting-up the registers before
calling
Hi,
I am missing some reply/review from Stefano (see below).
On 14/05/2019 13:24, Julien Grall wrote:
Julien Grall (19):
xen/arm: Rework HSCTLR_BASE
More details input on his claim... and review for the following patches:
xen/arm: Remove parameter cpuid from start_xen
xen/arm32
Hi,
Gentle ping...
Cheers,
On 14/05/2019 13:31, Julien Grall wrote:
Hi all,
This is the third part of the boot/memory rework for Xen on Arm. At the
moment, the update to Xen PT is scattered all around mm.c. This makes
difficult to rework Xen memory layout or even ensuring we are following
printk(XENLOG_DEBUG fmt, ## args)
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enko
Reviewed-by: Stefano Stabellini
I will give an opportunity to Stefano to review it. If I don't hear anything by
Monday, I will merge it.
Thank you!
Cheers,
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building domain itself.
This patch goes through all the interrupt sources of device and skip it
if one of interrupt source is PPI. It fixes XEN boot on i.MX8MQ by
skipping PMU node.
Suggested-by: Julien Grall
Signed-off-by: Amit Singh Tomar
---
* This replaces following patch
On 29/05/2019 18:58, Oleksandr wrote:
>
> On 29.05.19 20:44, Julien Grall wrote:
>> Hi Oleksandr,
>
> Hi, Julien
>
>
>>
>> On 21/05/2019 18:37, Oleksandr Tyshchenko wrote:
>>> From: Oleksandr Tyshchenko
>>>
>>> The "int
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