At 07:52 -0600 on 22 Sep (1506066733), Jan Beulich wrote:
> >>> On 14.09.17 at 14:58, wrote:
> > The l1 mask needs to stay in x86/mm.c while l{2,3,4} masks are only
> > needed by PV code. Both x86 common mm code and PV mm code use
> > base_disallow_mask and l1 maks.
> >
> >
On Fri, Sep 22, 2017 at 07:52:13AM -0600, Jan Beulich wrote:
> >>> On 14.09.17 at 14:58, wrote:
> > The l1 mask needs to stay in x86/mm.c while l{2,3,4} masks are only
> > needed by PV code. Both x86 common mm code and PV mm code use
> > base_disallow_mask and l1 maks.
> >
>
>>> On 14.09.17 at 14:58, wrote:
> The l1 mask needs to stay in x86/mm.c while l{2,3,4} masks are only
> needed by PV code. Both x86 common mm code and PV mm code use
> base_disallow_mask and l1 maks.
>
> Export base_disallow_mask and l1 mask in asm-x86/mm.h.
So that's
The l1 mask needs to stay in x86/mm.c while l{2,3,4} masks are only
needed by PV code. Both x86 common mm code and PV mm code use
base_disallow_mask and l1 maks.
Export base_disallow_mask and l1 mask in asm-x86/mm.h.
Signed-off-by: Wei Liu
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xen/arch/x86/mm.c| 12