From: Suravee Suthikulpanit
Enabling AVIC implicitly disables the V_IRQ, V_INTR_PRIO, V_IGN_TPR,
and V_INTR_VECTOR fields in the VMCB Control Word. Therefore, this patch
introduces new interrupt injection code via AVIC backing page.
Signed-off-by: Suravee Suthikulpanit
---
xen/arch/x86/hvm/svm
From: Suravee Suthikulpanit
This patch introduces a new Xen command line option to enable/disable
SVM sub-options. Currently, it support sub-option "avic", which can
be used to enable/disable SVM AVIC feature.
Signed-off-by: Suavee Suthikulpant
Signed-off-by: Janakarajan Natarajan
enable/disable AVIC support.
Currently, this svm-avic is disabled by default.
Signed-off-by: Suravee Suthikulpanit
Signed-off-by: Janakarajan Natarajan
---
xen/arch/x86/hvm/svm/Makefile | 1 +
xen/arch/x86/hvm/svm/avic.c| 191 +
xen/arch/x86
OVERVIEW
This patchset is the first of a two-part patch series to introduce
the AMD Advanced Virtual Interrupt Controller (AVIC) support.
The AVIC hardware virtualizes local APIC registers of each vCPU via
the virtual APIC (vAPIC) backing page. This allows the guest to access
certain APIC
From: Suravee Suthikulpanit
Add hooks to manage AVIC data structure during vcpu scheduling.
Signed-off-by: Suravee Suthikulpanit
Signed-off-by: Janakarajan Natarajan
---
xen/arch/x86/hvm/svm/avic.c | 54 +
xen/arch/x86/hvm/svm/svm.c | 10
From: Suravee Suthikulpanit
This patch modifies the hvm_function_table.virtual_intr_delivery_enabled()
to become a bool variable as both VMX and SVM simply return static value.
Also, this patch hooks up virtual_intr_delivery_enabled and
deliver_posted_intr functions when AVIC is enabled.
Signed
-triggered mode.
This patch also declare vlapic_read_aligned() and vlapic_reg_write()
as non-static to expose them to be used by AVIC.
Signed-off-by: Suravee Suthikulpanit
Signed-off-by: Janakarajan Natarajan
---
xen/arch/x86/hvm/svm/avic.c| 296 +
xen
From: Suravee Suthikulpanit
Adding new key-handler "j" for dumping AVIC-related information.
Here is an example of per-domain statistics being dumped.
*** SVM AVIC Statistics **
>>> Domain 1 <<<
VCPU 0
* incomp_ipi = 3110
* noaccel= 236475
From: Suravee Suthikulpanit
Introduce AVIC-related VMCB fields.
Signed-off-by: Suravee Suthikulpanit
Signed-off-by: Janakarajan Natarajan
---
xen/include/asm-x86/hvm/svm/vmcb.h | 23 +++
1 file changed, 15 insertions(+), 8 deletions(-)
diff --git a/xen/include/asm-x86
AMD AVIC code makes use of vlapic_reg_read() and vlapic_reg_write(). To
do this make the functions non-static.
Signed-off-by: Janakarajan Natarajan
---
xen/arch/x86/hvm/vlapic.c| 4 ++--
xen/include/asm-x86/hvm/vlapic.h | 4
2 files changed, 6 insertions(+), 2 deletions(-)
diff
-triggered mode.
Signed-off-by: Suravee Suthikulpanit
Signed-off-by: Janakarajan Natarajan
---
xen/arch/x86/hvm/svm/avic.c| 292 +
xen/arch/x86/hvm/svm/svm.c | 8 +
xen/include/asm-x86/hvm/svm/avic.h | 3 +
xen/include/asm-x86/hvm/svm/vmcb.h
From: Suravee Suthikulpanit
This patch introduces a new Xen command line option to enable/disable
SVM sub-options. Currently, it supports sub-option "avic", which can
be used to enable/disable SVM AVIC feature.
Signed-off-by: Suavee Suthikulpant
Signed-off-by: Janakarajan Natarajan
tch descriptions.
* Miscellaneous fixes based on feedback.
Janakarajan Natarajan (2):
x86/HVM: Rename vlapic_read_aligned() to vlapic_reg_read()
x86/HVM: Make vlapic_reg_read/write() non-static
Suravee Suthikulpanit (8):
x86/SVM: Modify VMCB fields to add AVIC support
x86/HVM/SVM: Add A
Rename vlapic_read_aligned() to vlapic_reg_read() to make it a pair of
vlapic_reg_write().
Signed-off-by: Janakarajan Natarajan
---
xen/arch/x86/hvm/vlapic.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c
From: Suravee Suthikulpanit
Enabling AVIC implicitly disables the V_IRQ, V_INTR_PRIO, V_IGN_TPR,
and V_INTR_VECTOR fields in the VMCB Control Word. Therefore, this patch
introduces new interrupt injection code via AVIC backing page.
Signed-off-by: Suravee Suthikulpanit
---
xen/arch/x86/hvm/svm
From: Suravee Suthikulpanit
Add hooks to manage AVIC data structure during vcpu scheduling.
Signed-off-by: Suravee Suthikulpanit
Signed-off-by: Janakarajan Natarajan
---
xen/arch/x86/hvm/svm/avic.c | 51 +
xen/arch/x86/hvm/svm/svm.c | 10
From: Suravee Suthikulpanit
Introduce AVIC base initialization code. This includes:
* Setting up per-VM data structures.
* Setting up per-vCPU data structure.
* Initializing AVIC-related VMCB bit fields.
Signed-off-by: Suravee Suthikulpanit
Signed-off-by: Janakarajan Natarajan
From: Suravee Suthikulpanit
Introduce AVIC-related VMCB fields.
Signed-off-by: Suravee Suthikulpanit
Signed-off-by: Janakarajan Natarajan
---
xen/include/asm-x86/hvm/svm/vmcb.h | 23 +++
1 file changed, 15 insertions(+), 8 deletions(-)
diff --git a/xen/include/asm-x86
From: Suravee Suthikulpanit
This patch modifies the hvm_function_table.virtual_intr_delivery_enabled()
to become a bool variable as both VMX and SVM simply return static value.
Also, this patch hooks up virtual_intr_delivery_enabled and
deliver_posted_intr functions when AVIC is enabled.
Signed
Suthikulpanit
Signed-off-by: Janakarajan Natarajan
---
xen/arch/x86/hvm/svm/avic.c| 54 +-
xen/arch/x86/irq.c | 2 ++
xen/include/asm-x86/hvm/svm/avic.h | 3 +++
xen/include/asm-x86/hvm/svm/vmcb.h | 6 +
4 files changed, 64 insertions(+), 1 d
UTC time range when you can attend
15:00-23:00
Your sincerely,
Lars
Janakarajan Natarajan
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