On Mon, 19 Feb 2018 14:48:37 +
Andrew Cooper wrote:
>On 19/02/18 14:23, Igor Druzhinin wrote:
>> We're noticing a reproducible system boot hang on certain
>> post-Skylake platforms where the BIOS is configured in
>
>These are Skylake, not post-Skylake.
Well, strictly speaking, any platform
>>> On 19.02.18 at 16:20, wrote:
> On 19/02/18 15:18, Jan Beulich wrote:
> On 19.02.18 at 15:23, wrote:
>>> We're noticing a reproducible system boot hang on certain
>>> post-Skylake platforms where the BIOS is configured in
>>> legacy boot mode with x2APIC disabled. The system stalls
>>> imm
On 19/02/18 15:18, Jan Beulich wrote:
On 19.02.18 at 15:23, wrote:
>> We're noticing a reproducible system boot hang on certain
>> post-Skylake platforms where the BIOS is configured in
>> legacy boot mode with x2APIC disabled. The system stalls
>> immediately after writing the first SMP init
>>> On 19.02.18 at 15:23, wrote:
> We're noticing a reproducible system boot hang on certain
> post-Skylake platforms where the BIOS is configured in
> legacy boot mode with x2APIC disabled. The system stalls
> immediately after writing the first SMP initialization
> sequence into APIC ICR.
>
> T
On 19/02/18 14:23, Igor Druzhinin wrote:
> We're noticing a reproducible system boot hang on certain
> post-Skylake platforms where the BIOS is configured in
These are Skylake, not post-Skylake.
> legacy boot mode with x2APIC disabled. The system stalls
> immediately after writing the first SMP i
