Re: [Xen-ia64-devel] [Patch] Fix typo. (PALL - PAL)
applied, thanks. On Fri, Nov 14, 2008 at 03:55:50PM +0900, Akio Takebe wrote: Content-Description: Mail message body Hi, Fix typo. (PALL - PAL) Signed-off-by: Akio Takebe [EMAIL PROTECTED] Best Regards, Akio Takebe ___ Xen-ia64-devel mailing list Xen-ia64-devel@lists.xensource.com http://lists.xensource.com/xen-ia64-devel -- yamahata ___ Xen-ia64-devel mailing list Xen-ia64-devel@lists.xensource.com http://lists.xensource.com/xen-ia64-devel
[Xen-ia64-devel] [Test Report] Weekly Xen-IPF Test Report ------ 2008-11-14
Hi all, No new Csets for IPF last week. Latest Cset#18763 is stable. We also did some stress test for VTI with Cset#18633. Result is good! Next stress, we will choose the last three cases running for 24 hours each. = Platform: Tiger4 VTI Configuration: UP, 512M [PASS] Xen crashme stress, 8 hours [PASS] Xen helltest stress, 8 hours [PASS] Xen cvworkloads stress, 8 hours [PASS] Xen ltp stress, 8 hours [PASS] Xen kernelbuild stress, 8 hours [PASS] Run crashme,helltest,cvworkload ltp kernelbuild serially for 20 hours [PASS] Run crashme helltest cvworkload ltp kernelbuild parallely for 20 hours [PASS] Xen stress for win2k8, 8 hours Current unfixed issues (total 3): = 1. with IRQBALANCE service start, dom0 will crash on RHEL5u2 2. Dom0 and Win2k3_VTI with e1000 can not ping each other 3. When all the vcpus are taken by Dom0, SMP_VTI booting speed is very slow during NVRAM loading period. Thanks, Zhang Jingke ___ Xen-ia64-devel mailing list Xen-ia64-devel@lists.xensource.com http://lists.xensource.com/xen-ia64-devel
[Xen-ia64-devel] [PATCH] Fix a bug for XEN_VIRT_UC_BIT use.
Fix a bug for XEN_VIRT_UC_BIT use. Signed-off-by : Zhang Xiantao [EMAIL PROTECTED] diff -r 9bc00e9716cd xen/arch/ia64/vmx/vmx_ivt.S --- a/xen/arch/ia64/vmx/vmx_ivt.S Fri Nov 07 19:34:59 2008 +0900 +++ b/xen/arch/ia64/vmx/vmx_ivt.S Mon Nov 17 11:12:58 2008 +0800 @@ -314,7 +314,7 @@ vmx_alt_itlb_miss_vmm: movl r19=(((1 IA64_MAX_PHYS_BITS) - 1) ~0xfff) ;; and r19=r19,r16 // clear ed, reserved bits, and PTE control bits -extr.u r18=r16,XEN_VIRT_UC_BIT, 15// extract UC bit +extr.u r18=r16,XEN_VIRT_UC_BIT, 1// extract UC bit ;; or r19=r17,r19 // insert PTE control bits into r19 mov r20=IA64_GRANULE_SHIFT2 Fix-XEN_VIRT_UC_BIT-use.patch Description: Fix-XEN_VIRT_UC_BIT-use.patch ___ Xen-ia64-devel mailing list Xen-ia64-devel@lists.xensource.com http://lists.xensource.com/xen-ia64-devel
Re: [Xen-ia64-devel] [PATCH] Fix a bug for XEN_VIRT_UC_BIT use.
Hi. This patch itself looks okay. Just for confirming. This patch doesn't affect the result because the following line sees only the lsb 0 bit of r18. Correct? extr.u r18=r16,XEN_VIRT_UC_BIT, 15// extract UC bit ... dep r19=r18,r19,4,1 // set bit 4 (uncached) if the access was to UC region On Mon, Nov 17, 2008 at 11:20:49AM +0800, Zhang, Xiantao wrote: Fix a bug for XEN_VIRT_UC_BIT use. Signed-off-by : Zhang Xiantao [EMAIL PROTECTED] diff -r 9bc00e9716cd xen/arch/ia64/vmx/vmx_ivt.S --- a/xen/arch/ia64/vmx/vmx_ivt.S Fri Nov 07 19:34:59 2008 +0900 +++ b/xen/arch/ia64/vmx/vmx_ivt.S Mon Nov 17 11:12:58 2008 +0800 @@ -314,7 +314,7 @@ vmx_alt_itlb_miss_vmm: movl r19=(((1 IA64_MAX_PHYS_BITS) - 1) ~0xfff) ;; and r19=r19,r16 // clear ed, reserved bits, and PTE control bits -extr.u r18=r16,XEN_VIRT_UC_BIT, 15// extract UC bit +extr.u r18=r16,XEN_VIRT_UC_BIT, 1// extract UC bit ;; or r19=r17,r19 // insert PTE control bits into r19 mov r20=IA64_GRANULE_SHIFT2 ___ Xen-ia64-devel mailing list Xen-ia64-devel@lists.xensource.com http://lists.xensource.com/xen-ia64-devel -- yamahata ___ Xen-ia64-devel mailing list Xen-ia64-devel@lists.xensource.com http://lists.xensource.com/xen-ia64-devel
RE: [Xen-ia64-devel] [PATCH] Fix a bug for XEN_VIRT_UC_BIT use.
Yes, only bit 0 is used for dep. Xiantao Isaku Yamahata wrote: Hi. This patch itself looks okay. Just for confirming. This patch doesn't affect the result because the following line sees only the lsb 0 bit of r18. Correct? extr.u r18=r16,XEN_VIRT_UC_BIT, 15// extract UC bit ... dep r19=r18,r19,4,1 // set bit 4 (uncached) if the access was to UC region On Mon, Nov 17, 2008 at 11:20:49AM +0800, Zhang, Xiantao wrote: Fix a bug for XEN_VIRT_UC_BIT use. Signed-off-by : Zhang Xiantao [EMAIL PROTECTED] diff -r 9bc00e9716cd xen/arch/ia64/vmx/vmx_ivt.S --- a/xen/arch/ia64/vmx/vmx_ivt.SFri Nov 07 19:34:59 2008 +0900 +++ b/xen/arch/ia64/vmx/vmx_ivt.SMon Nov 17 11:12:58 2008 +0800 @@ -314,7 +314,7 @@ vmx_alt_itlb_miss_vmm: movl r19=(((1 IA64_MAX_PHYS_BITS) - 1) ~0xfff) ;; and r19=r19,r16 // clear ed, reserved bits, and PTE control bits -extr.u r18=r16,XEN_VIRT_UC_BIT, 15// extract UC bit +extr.u r18=r16,XEN_VIRT_UC_BIT, 1// extract UC bit ;; or r19=r17,r19 // insert PTE control bits into r19 mov r20=IA64_GRANULE_SHIFT2 ___ Xen-ia64-devel mailing list Xen-ia64-devel@lists.xensource.com http://lists.xensource.com/xen-ia64-devel ___ Xen-ia64-devel mailing list Xen-ia64-devel@lists.xensource.com http://lists.xensource.com/xen-ia64-devel
