Looking at xlate.c, the htab and entries are access in following way:
struct vcpu *v = get_current();
struct domain *d = v->domain;
struct domain_htab *htab = &d->arch.htab;
union pte volatile *pte;
pte = &htab->map[ptex];
I've inserted this code into xen/arch/powerpc/domctl
One day, all mpic operations will happen in Xen,
Ah, you got me worried already. But this MPIC-sharing
architecture is temporary, good :-)
Segher
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On Oct 7, 2006, at 9:15 AM, Segher Boessenkool wrote:
The code of concern seems well suited to catch a spurious interrupt
storm, since when a valid external interrupt is recieved, the
counter is
reset. But given that we don't take our first external until way
into
dom0's boot, we are actu
The code of concern seems well suited to catch a spurious interrupt
storm, since when a valid external interrupt is recieved, the
counter is
reset. But given that we don't take our first external until way into
dom0's boot, we are actually asserting that 100 spurious interrupts
won't be receiv
