On Tuesday 29 June 2010 22:43:40 Martin Jansa wrote: > On Tue, Jun 29, 2010 at 10:25:07PM +0200, David Garabana Barro wrote: > > With latest SHR-u, I cannot access my uSD > > It worked perfectly with 2.6.29. > > http://lists.shr-project.org/pipermail/shr-devel/2010-June/002807.html
It works for me with glamo_mci.sd_max_clk<=16373000 For every value >16373000 and <=21000000, partition table is not recognized on boot. However, you can use "hdparm -z" and use uSD after boot with values >16372000 Relevant dmesg fragments: glamo_mci.sd_max_clk=16373000 [ 2.365000] s3c-sdi s3c2440-sdi: mmc1 - using pio, sw SDIO IRQ [ 2.925000] mmc0: new high speed SDHC card at address b368 [ 2.935000] mmcblk0: mmc0:b368 USD 14.9 GiB [ 2.935000] mmcblk0: p1 p2 p3 p4 < p5 p6 p7 > [ 2.910000] glamo-mci glamo-mci.0: powered (vdd = 15) clk: 12279kHz div=0 (req: 16372kHz). Bus width=0 [ 2.930000] glamo-mci glamo-mci.0: powered (vdd = 15) clk: 12279kHz div=0 (req: 16372kHz). Bus width=2 glamo_mci.sd_max_clk=16374000 [ 2.365000] s3c-sdi s3c2440-sdi: mmc1 - using pio, sw SDIO IRQ [ 2.925000] mmc0: new high speed SDHC card at address b368 [ 2.935000] mmcblk0: mmc0:b368 USD 14.9 GiB [ 2.935000] mmcblk0: unknown partition table [ 2.905000] glamo-mci glamo-mci.0: powered (vdd = 15) clk: 16373kHz div=0 (req: 16374kHz). Bus width=0 [ 2.925000] glamo-mci glamo-mci.0: powered (vdd = 15) clk: 16373kHz div=0 (req: 16374kHz). Bus width=2 It seems sd clock "jupms" from 12279kHz to 16373kHz when you specify a max_clk higher than 16374000 Is this behaviuor normal? Should I open a bug against 2.6.32? (as with 2.6.29 it worked with the same card)
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