Reworked in the algorithm:
- Fixed the polarity setting
- Taken in consideration the first transition
- Using the 'None' state instead of -1 and 0 value
- Simplify the algorithm and remove useless branches and variables
- Avoid re-calculated the same thing more than once
- Renamed few variables for a better understanding
- Duty cycle precision changed to floating value
Otherwise:
- Added a meta OUTPUT for the duty cycle average
- Renamed the polarity option:
'polarity', 'active low/high' are well-understood terms.
- Added comments
Signed-off-by: Sebastien Bourdelin <[email protected]>
---
Changes v1 -> v2:
- restore the OUTPUT_BINARY (suggested by [email protected])
- add copyright (suggested by [email protected])
- removed useless 'is True' (suggested by [email protected])
---
decoders/pwm/__init__.py | 1 +
decoders/pwm/pd.py | 94 +++++++++++++++++++++++++++++++-----------------
2 files changed, 62 insertions(+), 33 deletions(-)
diff --git a/decoders/pwm/__init__.py b/decoders/pwm/__init__.py
index 096e077..b413bf6 100644
--- a/decoders/pwm/__init__.py
+++ b/decoders/pwm/__init__.py
@@ -2,6 +2,7 @@
## This file is part of the libsigrokdecode project.
##
## Copyright (C) 2014 Torsten Duwe <[email protected]>
+## Copyright (C) 2014 Sebastien Bourdelin
<[email protected]>
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
diff --git a/decoders/pwm/pd.py b/decoders/pwm/pd.py
index 999b496..34f46b2 100644
--- a/decoders/pwm/pd.py
+++ b/decoders/pwm/pd.py
@@ -2,6 +2,7 @@
## This file is part of the libsigrokdecode project.
##
## Copyright (C) 2014 Torsten Duwe <[email protected]>
+## Copyright (C) 2014 Sebastien Bourdelin
<[email protected]>
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
@@ -20,6 +21,7 @@
import sigrokdecode as srd
+
class Decoder(srd.Decoder):
api_version = 2
id = 'pwm'
@@ -33,8 +35,8 @@ class Decoder(srd.Decoder):
{'id': 'pwm', 'name': 'PWM in', 'desc': 'Modulation pulses'},
)
options = (
- {'id': 'new_cycle_edge', 'desc': 'New cycle on which edge',
- 'default': 'rising', 'values': ('rising', 'falling')},
+ {'id': 'polarity', 'desc': 'Polarity',
+ 'default': 'active-high', 'values': ('active-low', 'active-high')},
)
annotations = (
('value', 'PWM value'),
@@ -44,54 +46,80 @@ class Decoder(srd.Decoder):
)
def __init__(self, **kwargs):
- self.ss = self.es = -1
- self.high = 1
- self.low = 1
- self.lastedge = 0
- self.oldpin = 0
- self.startedge = 0
+ self.ss = self.es = None
+ self.first_transition = True
+ self.first_samplenum = None
+ self.start_samplenum = None
+ self.end_samplenum = None
+ self.oldpin = None
self.num_cycles = 0
+ self.average = 0
def start(self):
- self.out_python = self.register(srd.OUTPUT_PYTHON)
+ self.startedge = 0 if self.options['polarity'] == 'active-low' else 1
self.out_ann = self.register(srd.OUTPUT_ANN)
self.out_bin = self.register(srd.OUTPUT_BINARY)
- self.out_freq = self.register(srd.OUTPUT_META,
- meta=(int, 'Frequency', 'PWM base (cycle) frequency'))
- self.startedge = 0
- if self.options['new_cycle_edge'] == 'falling':
- self.startedge = 1
+ self.out_average = \
+ self.register(srd.OUTPUT_META,
+ meta=(float, 'Average', 'PWM base (cycle)
frequency'))
def putx(self, data):
self.put(self.ss, self.es, self.out_ann, data)
- def putp(self, data):
- self.put(self.ss, self.es, self.out_python, data)
-
def putb(self, data):
self.put(self.num_cycles, self.num_cycles, self.out_bin, data)
-
+
def decode(self, ss, es, data):
+
for (self.samplenum, pins) in data:
# Ignore identical samples early on (for performance reasons).
if self.oldpin == pins[0]:
continue
- if self.oldpin == 0: # Rising edge.
- self.low = self.samplenum - self.lastedge
- else:
- self.high = self.samplenum - self.lastedge
-
- if self.oldpin == self.startedge:
- self.es = self.samplenum # This interval ends at this edge.
- if self.ss >= 0: # Have we completed a hi-lo sequence?
- self.putx([0, ["%d%%" % ((100 * self.high) // (self.high +
self.low))]])
- self.putb((0, bytes([(256 * self.high) // (self.high +
self.low)])))
- self.num_cycles += 1
+ # Initialize first self.oldpins with the first
+ # sample value.
+ if self.oldpin is None:
+ self.oldpin = pins[0]
+ continue
+
+ if self.first_transition:
+ # First rising edge
+ if self.oldpin != self.startedge:
+ self.first_samplenum = self.samplenum
+ self.start_samplenum = self.samplenum
+ self.first_transition = False
else:
- # Mid-interval.
- # This interval started at the previous edge.
- self.ss = self.lastedge
+ # Rising edge
+ if self.oldpin != self.startedge:
+ # We are on a full cycle we can calculate
+ # the period, the duty cycle and its ratio.
+ period = self.samplenum - self.start_samplenum
+ duty = self.end_samplenum - self.start_samplenum
+ ratio = float(duty / period)
+
+ # This interval start at this edge.
+ self.ss = self.start_samplenum
+ # Store the new rising edge position and the ending
+ # edge interval
+ self.start_samplenum = self.es = self.samplenum
+
+ # We can report the duty cycle in percent
+ percent = float(ratio * 100)
+ self.putx([0, ["%f%%" % percent]])
+
+ # We can report the duty cycle in the binary output
+ self.putb((0, bytes([int(ratio * 256)])))
+
+ # We can update and report the new duty cycle average
+ self.num_cycles += 1
+ self.average += percent
+ self.put(self.first_samplenum,
+ self.es,
+ self.out_average,
+ float(self.average / self.num_cycles))
+
+ # Falling edge
+ else:
+ self.end_samplenum = self.ss = self.samplenum
- self.lastedge = self.samplenum
self.oldpin = pins[0]
--
1.8.3.4
------------------------------------------------------------------------------
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