Hi,

On Sun, Apr 03, 2016 at 10:30:37PM +0200, Diego Asanza wrote:
> This pull request fixes some issues with the fx2lafw dslogic implementation.

Great stuff, thanks!

 
> As for now basic capture, voltage thresholds, external clock
> and clock edge are working.
> 
> [email protected]:asanza/libsigrok.git

I've pulled "Set DSLogic in logic analyzer mode." for now, thanks! I'll
have a look at the other patches as well, but many of them seem to have
unrelated whitespace or even functional changes. Can you please rebase
the patchset on top of HEAD and remove all unrelated changes from each
commit? If possible also split up some of the bigger commits and
implement only one specific coherent change per commit.


Thanks! Uwe.
-- 
http://hermann-uwe.de | http://randomprojects.org | http://sigrok.org

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