Hi,
thanks for the review. You are right, a lot of white-space changes,
sorry for that.
Let me do that again, hope this time right.
The following changes since commit 1f706c21a2977c768692f72d09b35633628d2b0d:
input: vcd: skip BOM at beginning of file (2016-04-13 09:35:03 +0200)
are available in the git repository at:
g...@github.com:asanza/libsigrok.git master
for you to fetch changes up to b4d82a444a5e2f86bb30e6da58d1d5edffd62c1b:
Ensure dslogic can be stopped. After acquisition start, dslogic
stores samples in memory, and when done it sends an usb packet with
the trigger possition. (2016-04-13 20:50:37 +0200)
----------------------------------------------------------------
Diego F. Asanza (1):
Ensure dslogic can be stopped. After acquisition start,
dslogic stores samples in memory, and when done it sends an usb
packet with the trigger possition.
src/hardware/fx2lafw/api.c | 31 +++++++++++++++++++++++++++++--
1 file changed, 29 insertions(+), 2 deletions(-)
more patches follows as soon as I get some free time.
Regards,
Diego
On Wed, Apr 13, 2016 at 9:43 AM, Uwe Hermann <u...@hermann-uwe.de> wrote:
> Hi,
>
> On Sun, Apr 03, 2016 at 10:30:37PM +0200, Diego Asanza wrote:
>> This pull request fixes some issues with the fx2lafw dslogic implementation.
>
> Great stuff, thanks!
>
>
>> As for now basic capture, voltage thresholds, external clock
>> and clock edge are working.
>>
>> g...@github.com:asanza/libsigrok.git
>
> I've pulled "Set DSLogic in logic analyzer mode." for now, thanks! I'll
> have a look at the other patches as well, but many of them seem to have
> unrelated whitespace or even functional changes. Can you please rebase
> the patchset on top of HEAD and remove all unrelated changes from each
> commit? If possible also split up some of the bigger commits and
> implement only one specific coherent change per commit.
>
>
> Thanks! Uwe.
> --
> http://hermann-uwe.de | http://randomprojects.org | http://sigrok.org
------------------------------------------------------------------------------
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