Build sigrok under Mac OS Sierra 10.12.4, problems (2017-04-23)

Problem #1, libsigrok:
compile errors:
   In file included from librigrok/src/hardware/ftdi-la/api.c:21:
   In file included from /opt/local/include/ftdi.h:20:
   /opt/local/include/usb.h:81:2: error: unknown type name 'u_int8_t'; 
did you mean '__int8_t'?
         u_int8_t  bLength;
         ^~~~~~~~
         __int8_t
...
20 errors
Comment: type u_int8_t is not defined

CHECK for missing type:
cat /usr/include/i386/types.h
...
#include <sys/_types/_u_int8_t.h>
...

Solution:
# copy types.h to needed folder
$ sudo cp /usr/include/i386/types.h /opt/local/include/types.h

EDIT file: /opt/local/include/usb.h
     ...
     #include <unistd.h>
     #include <stdlib.h>
     #include <limits.h>

     #include <dirent.h>

     ADD missing file types.h
     // type problem at Mac OS Sierra 10.12.4, 2017.04.23 RR
     #include "types.h"


Problem #2, pulseview, compile error on warnings
Comment to file pulseview/CMakeLists.txt:
     The option "Build without -Werror" FALSE
     must be changed to TRUE

Solution: Edit file pulseview/CMakeLists.txt
$ cat CMakeLists.txt | grep -nC 2 Werror
31-#---------------------------------------------------
32-# 2017-04-23 RR
33:option(DISABLE_WERROR "Build without -Werror" TRUE)
34:#option(DISABLE_WERROR "Build without -Werror" FALSE)
...

Problem #3, pulseview, decoder UART, Trigger delay
There is a "trailing edge" Trigger delay of 1,1 - 4,9 ms in 10 measurements:
3.0, 1.2, 2.5, 1.3, 3.9, 2.4, 1.1, 3.7, 2.1, 4.9 ms
The behaviour is the same in Trigger mode "leading edge" or "both edges".
Device: CWAV USBee AX
fx2lafw: Detected REVID=1, it's a Cypress CY7C68013A (FX2LP).
UART 115,200 Baud 8N1, no parity
Characters send: 5, 0x0D (carriage return)
5k samples, 500 KHz sampling rate.

The installation details in Menu->Settings->About are:
PulseView 0.4.0-git-fe934a9

Used libraries:
Qt              5.7.1
libsigrok       0.5.0-git-07d4e86 (lib version 3:0:0)
libsigrokdecode 0.5.0-git-ddc23d8 (lib version 3:0:0)

How can the (random) Trigger delay been explained?

Regards, Rudolf DL5FA


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