Hello,
I have a Zeroplus LAP-C 32000 and had to realize, that the external
clock feature is prepared but not fully implemented in the source code:
libsigrok/src/hardware/zeroplus-logic-cube/analyzer.c:
/* Sele_Inside_Outside_Clock */
gl_reg_write(devh, CLOCK_SOURCE, 0x03);
I experimented with values 0x2 (external clock rising edge ?) and 0x0
(external clock falling edge ?) and it seems, that is working at least
with my hardware with Windows10 and sigrok-cli for first tests.
Is there any reason for not fully implement that feature? Are there
problems with different hardware / OS/ various settings/... ?
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