Created a Pull-Request on github for this
(https://github.com/sigrokproject/libsigrok/pull/174)
this enables the "external clock mode" in the Zeroplus LAP-C Logic Cube
driver (falling and rising edge), so that this mode also can be used in
sigrok-cli and pulseview.
I investigated the USB clocksource value further by USB-sniffing the
original vendor software in different modes. This reveales a hidden
error in the original code and the values for the external clock:
0x0 - external clock falling edge
0x01 - internal clock
0x2 - external clock rising edge
so I´m really keen to talk to the first developer of this driver (no
offense!), because I´m interested why this was not fully implemented (my
finding was really small compared to the effort of developing the recent
version of the driver)
On 03.02.2022 20:58, Ronny Habel wrote:
Here are my first try to enable the "external clock mode". (Because it
was remarked in the libera-chat, why I not created a patch for that):
I´m unsure about the value in
/* Sele_Inside_Outside_Clock */
gl_reg_write(devh, CLOCK_SOURCE, 0x03); - that was the original line,
that I call "It prepares the external clock mode"
0x03 - internal clock (original code)
0x2 - external clock rising edge ? found it by try and error
0x0 - external clock falling edge ?found it by try and error
....
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