That's a very comprehensive list of equipment supported, but doesn't yet cover the GW-Instek mixed signal scope we use at The National Museum of Computers for the EDSAC Replica project.
https://www.tnmoc.org/edsac I am using a cheap chinese 16 ch FX2-USB device with suitable attenuators and our own python decoder for the serial data on any channel (EDSAC was a serial computer). It would be great if we could combine the 4 channel scope with the 16 controllable threshold logic analyser channels to improve our debugging game. Failing thermionic valves are difficult to detect at the moment until they become really knackered. I have used the provided LabView code to look at the scope, but it is almost completely useless for the debugging we need. So if anyone has the skill to get that mixed signal scope connected to sigrok, that would be great. I have attached a screenshot of the sort of thing we see on our 16 channel analyser. Tony On Mon, 14 Feb 2022 at 11:43, PlusNET: Subs <s...@qcontinuum.plus.com> wrote: > Bob, > > Now that the site it back up, I can give you a link to the WiKi: > > https://sigrok.org/wiki/Supported_hardware#Logic_analyzers > > Curiously, mine was previously shown, but I don't see it anymore. > > > > On 10/02/2022 07:25, landro...@volloeko.de wrote: > > Hi John, > > > > not used to mailing lists... replied directly instead of to the list... > Sorry for that! > > > > it is sold on ebay without a name, has some chinese writing on it ans > "Analyzer 24MHz 8CH" as well as the pinout. > > Seller claims it to be 100% Saleae compatible. > > > > Not much inside the tiny black box. I could identify a Cypress USB > controller CY7C68013A-56LTXC, 24MHz crystal, ATMHK24C02N (Atmel/Microchip?) > 16k I²C EEPROM, Sunrom 3,3V LDO, 2 LEDs (labeled red & green. Green > actually beeing a red one and the other remains dark) > > > > I also found out a bit more about the behaviour in PulseView > > > > up to 500kHz the amount of data actually is collected as set by the > #Samples and samplerate. Time also matches (#samples * samplerate). I.e. 2 > seconds for 1MSamples and 500kH > > > > Increasing the samplerate (#samples = 1M) to 1MHz yields only 41ms of > data, > > for 2MHz I get 20,5ms in one run, 81 in the next > > for 6MHz i got 10ms in one attempt, 30 in the next > > This seems not to be consistent, but for high samplerates (>12MHz p to > now I always got 10ms worth of data regardless of the #samples, except if I > set it lower then, no data at all > > > > But when I acquire data on a triggered event (falling slope on D0 for > instance) I get no data at all wih sample rates above 500kHz > > > > Thats about everything I found out on this soewhat erratic behaviour of > my device. > > Maybe I get another variant for testing... > > > > Bob > > > > > >> Gesendet: Dienstag, 08. Februar 2022 um 17:38 Uhr > >> Von: "PlusNET: Subs" <s...@qcontinuum.plus.com> > >> An: sigrok-devel@lists.sourceforge.net > >> Betreff: Re: [sigrok-devel] newbie question > >> > >> Which variant of the "cheap chinese" logic analysers do you have? There > >> are several variants and although they are similar, they are not all > >> quite the same. Sigrok.org has several examples and information on > >> whether they are supported or not and which driver is required, but > >> unfortunately it has been down since at least Saturday so I can't > >> provide you a link at the moment. > >> > >> It could be driver related or even a hardware fault. Mine is rated up to > >> 24MHz and easily does 4MHz or 10MHz so yours should be able to do the > >> same. How many samples to capture are you setting? > >> > >> John. > >> > >> > >> On 08/02/2022 12:38, landro...@volloeko.de wrote: > >>> Hi, > >>> > >>> I am new to PulseView and am using a cheap chinese 24MHz logic > analyzer. > >>> Whenever I set the sampling rate to above 500kHz no data is shown in > the plot. > >>> Is this analyzer related or configuration related? > >>> > >>> Happy to hear what I'm doing wrong ;-) > >>> Bob > >>> > >>> > >>> _______________________________________________ > >>> sigrok-devel mailing list > >>> sigrok-devel@lists.sourceforge.net > >>> https://lists.sourceforge.net/lists/listinfo/sigrok-devel > >> -- > >> John. > >> > >> > >> > >> _______________________________________________ > >> sigrok-devel mailing list > >> sigrok-devel@lists.sourceforge.net > >> https://lists.sourceforge.net/lists/listinfo/sigrok-devel > >> > > > > _______________________________________________ > > sigrok-devel mailing list > > sigrok-devel@lists.sourceforge.net > > https://lists.sourceforge.net/lists/listinfo/sigrok-devel > > -- > John. > > > > _______________________________________________ > sigrok-devel mailing list > sigrok-devel@lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/sigrok-devel >
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