On 2017-05-18 03:23, Paul Koning wrote:
On May 17, 2017, at 8:00 PM, Matt Burke <[email protected]> wrote:
On 18/05/2017 00:18, Johnny Billquist wrote:
Hum. Do I remember wrong? I seem to remember that when you MOVB to a
register, the value should be sign extended. So not just the low byte
should have been modified.
Johnny
I think you may be thinking of MOVZBL (and MOVZWL for words).
Or the PDP11, where indeed MOVB sign extends.
Yeah, it definitely does it on the PDP-11. I always feel divided on
whether I think it should or not.
But I was obviously remembering wrong. MOV instructions on the VAX does
not sign extend. The CVT instructions are used if you want that.
Is MT_ASTLVL defined as a register where only the low byte has meaning?
Seems like it was using even fewer than 8 bits... Looked like it was
only 3 bits. But the register itself seems to be defined as 32 bits. I'm
not even sure any processor internal registers can be anything else.
All that said, Matt Burke seems like he already identified the issue
pretty correctly. The VAX 11/780 Hardware Handbook seems to clearly say
that bit 3-31 are ignored, and returns as 0 on read. So for that model,
I guess the value should be masked.
However, this might be different on different CPU models, so I suspect
this should be applied with care. He was testing VAX/VMS V4.5, which is
pretty ancient. The models supported by that version would probably only
be the VAX-11 models. (And yes, I include the 86x0 in the VAX-11 series.)
Johnny
--
Johnny Billquist || "I'm on a bus
|| on a psychedelic trip
email: [email protected] || Reading murder books
pdp is alive! || tryin' to stay hip" - B. Idol
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