As was pointed out, the existing PDP-8 CPU is basically a PDP-8/E or
-8/A. It doesn't have the model-specific capabilities of the current
PDP-11 CPU simulator.
Making the PDP-8 "model specific" is a bit more difficult than just
putting in model tests at various points in the CPU. The peripherals,
and the peripheral instruction sets, evolved too. The PDP-8's DECtape
controller is quite different from the TC08; the magtape controller is
different as well. With the 8/E, the original IOP 1,2,4 scheme was
replaced with the OmniBus, allowing peripherals to decode as many as 8
instructions per device code, instead of 3 or 4.
As for the PDP-5... it probably has different major peripherals too. So
it's not just the PC = location 0 problem.
I looked at a PDP-12 implementation. It's not hard, but I really didn't
want to do Yet Another DECtape Simulator for Linctape. With Rich
Cornwell's recent work, it's clear that the DECtape controllers should
have been abstracted to a library ten years ago, but doing so would be a
major PITA, now that there are six (at least) distinct implementations
(PDP1, PDP18b, PDP11, PDP8 TC, PDP8 TD, KA10).
/Bob
On 8/13/2019 5:19 AM, simh-requ...@trailing-edge.com wrote:
Has any ever thought of writing simulators for the two missing systems, the
PDP-5 and the PDP-12?
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