It would be just as easy to drive a D/A and have it stable
Andreas Troschka <[EMAIL PROTECTED]> wrote: There is no reason to; the
"pulsing" circuit part isn't placed in the front-end.
The PWM generated by the DSP is immediately integrated to a cc voltage, the
clean analog gain control signal, near the I/O pin of the processor.
If you consider what kind of pulsing signals are generated by the ADC (at e.g.
130Msps) and the following digital components processing a flood of quad burst
signals (the sampled data) you will understand that the low freq. PWM pulses
used for the AGC will disappear in this scenario.
AGC signal calculation is software implemented, and performed through the
analysis (by the DSP) of the samples coming from the ADC.
This permits to evaluate and calculate the AGC from the entire broad band of
what is presented to the ADC inputs.
The problem you underlined rising from the RF ADC input monitoring scheme is so
bypassed.
As I've stated before, software calculation of the AGC permits to have more
powerful performances compared to traditional analog schemes due to the
possibility to adopt adaptative, dynamic algorithms and automatic evaluation of
the conditions of what has to be received, what is disturbing (unwanted
signals), QSB, QRN etc. etc..
This algorithms can shape the AGC control signal adapting it automatically to
the kind of signal you try to receive (and respecting the ADCs max ratings for
the best performance).
This is a new powerful kind of AGC, aligned to the requirements of a modern SDR.
vy 73s de ik2wqi - Andreas
FRANCIS CARCIA wrote:
> I don't like anything pulsing in a RX front end to raise noise. maybe an
> analog AGC would be simple. just monitor the A/D input and reduce the gain
> when needed. The problem is the broad band input driving the agc monitor.
>
[Non-text portions of this message have been removed]
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