Needed Improvements on the "Triggered H&P" Circuit
The circuit diagram for this is in the files under "Push Pull VFO
Synchronizer.zip" and is named such since I now have a counter sync
correction circuit added to the scheme. To digitally push and pull
the frequency a little. So this is advancing along here now.
http://f1.grp.yahoofs.com/v1/ULXTRHoX8gfVC81sTRRk1SliP6S3TE69kpW5MJQqo5zd16F4Dz4y-7hkJMNzpCjLELhkIVoKjj9aSQIlnzrRLKKaztJDrYs5q6DOfek/Push%20Pull%20VFO%20Sychronizer.zip
The VFO noise figure itself is seperate from the noise of the
entired loop itself. I will be using software to analyze the noise
here later.
I have found out that the "Triggered H&P" circuit might not work as
it did the previous day and so I set out to discover why? With test
equipment I discovered undesired RF feedback from U2 to U1 which
causes hard mixing and undesired byproducts that can cause the circuit
to loose sync. So it is possible to have it synchronous and then at
other times not; depending on whether the feedback and its byproducts
of mixing is in sync or out of sync with the signal scheme at the
moment. So I eliminated this problem.
To over come the problem I introduced a 560 ohm and a 2.2k resistor
between the pins of U1 and U2 to attenuate this feedback acting as a
filter and load. The 2.2k resistor can be varied from as low as 560
up to 4.7k (and I have tried also 10k) depending upon the amount of
attenuation needed. This makes the circuit much more reliable to
restart and run as it did when it was last on. It appears to effect
how well it can do its job since it cleans up the sampled signal.
Also; upon reading the 74HC74 technical data sheets I read that when
the circuits triggering and timing conditions change, then the 74HC74
outputs a signal on the /Q output of pin 6. Since this could be used
in a scheme to re sync the circuit when it goes out of sync, I decided
to use it. The signal however is of the same polarity direction as Q
on pin 5 and I wanted it to go negative to counter the direction of Q
on the Varicap diode when needed. So I built a transistor high speed
switch that acts as a signal inverter to make the signal swing
negative and then I mixed it into the varicap diode voltage loop.
This theoretically is to produce a timed counter synchronous event to
pull the circuit timing back into sync and reduce drift. At least
thats my theory and it appears to make the Triggered circuit concept
work better. So it is now better synchronized from all that I can
tell by its observed performance. Filtering out the rf feedback from
U2 to U1 seemed to aid in furthering the other ideas since the circuit
is cleaner in its signal mixing. Perhaps in other H&P models this
matter of filtering also is of a concern but I have not seen it
addressed in the circuit diagrams.
The circuit is now working with hard frequency lock ups and in
between frequency settings appear to be less random in motion and
confined to a smaller Hz region more and hence more stable; so it runs
fairly well between lock frequencies. It however does not lock up so
hard that it resist slight tuning changes. I felt that the external
trigger would not only synchronise things better but when tuned the
sudden change in the trigger signal would immediately break up the
lock and allow tuning without a problem. I am pleased that this new
version is working as it is. And so I am confident that it will be
reliable at starting again and running. It seems to find its lock on
frequencies fairly fast and settles down fairly quickly.
I made changes to the diode loop and now use only one 1N4007. I
have made measurements of the voltages and am becoming more familiar
with the circuits operating conditions and understand it more now. I
might later add capacitors to my resistor filters but it will be
frequency dependent and so for other frequencies we need to know what
their reactances should be. I will explore more of the ideas of
filtering out the undesired products so we can have this running as
well as it can. Running cleaner signal wise. Cleaner should mean
also thats its sampling and signal comparison should work faster and
better.
I am attempting also to reduce randomized motion in those frequency
positions where there is no true lock but there still is a degree of
control for less random motion over a non controlled VFO. Then a
controlled VFO frequency running up around 30MHz or so, that is
digitally divided down, will then be extremely stable in all frequency
positions. Getting up to 30MHz later on on the VFO will be the
challenge. Hopefully some others will become interested in tinkering
and try to get this running up there in that region here before years
end.
There are then a few things I do not like about the H&P circuit and
so I feel I can not remedy that without going to 30MHz and divide that
down to achieve overall stability in 1 Hz and under; in all frequency
positions. Yet in true frequency lock positions the circuit is hard
to beat in stability as compared to other synthesis methods which will
not compare to the frequency stability this circuit can accomplish
when in true lock up on its fundamental running frequency. When
divided down the VFO then will appear to lock up hard every few Hertz
as compared to every 1kHz or so spacing when using the fundamental VFO
frequency. Stability then will be under 1 Hz drift and random noise.
Calculations of cummulative drift over a long time with the divided
down signal shows that with random motion due to non lock positions
the drift can reach a figure like +/- 12 Hz in a few hours. When it
is in a locked postion then that is reduced down to under 1 Hz.
Right now as simple as it is; I feel it is worth others tinkering
with. I have used it with an oscillator as high as 36 MHz for the
clock reference. I have a whole bunch of them oscillators so I can
check this out to higher clock frequencies to see if it will all run
up in those regions. So if you don't have a 24 MHz oscillator then
use whatever you have lower or higher in MHz.
If you can make it even better then do so! Innovate!
24 hours later I turned it on again and it started back up working
again as it should. So I am confident now that I discovered the reason
why it can loose synchronization; and have helped it also, by adding
in counter sync corrections with a negative going correction signal.
It is an amazing circuit and it is also a tough circuit to get a
handle on.
Later I plan to explore sychronizing this circuit to a frequency
counter for even more minute control. Hans Summers has a small
frequency counter circuit that I feel could become a correction
circuit when it is added into a bench frequency counter to read it. I
feel it will begin difficultly, but if it opens up, it should deduce
down to something simple in the end.
Dan ka9rza
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