Hi Janne,
An PLL LO with large step size indeed made tunning more difficult if you have 
to manually adjust both PLL freq and Winrad receive freq. It may not be a 
problem if you have both under "software" control. This will of course involve 
more software modification which may not be desirable for most people including 
me. This is why I built my Ad9954 DDS and tested it first with DL5MGH's 
software. It is not fun when your DDS is not working and you don't know whether 
you have  a hardware or software issue.
As to the spur level in AD9951 setup, it is probably not an issue at all since 
you will be using dual I/Q DDS. If you look at I0CG's design you will see spur 
is indeed negligible for AD9954 which have a 14 bit DAC for output. Spur level 
will increase at high output frequency when it is no longer a small fractions 
of the ref clock. For your application (Frcv >50 MHz) single DDS may not be a 
good idea since a LO >200MHz is needed to generate I/Q signals you need, this 
will definitely give you higher spur. But since you are using 2 DDS's to 
generate I and Q LO separately, I think spur won't be that big a problem. All 
you need to worry about is how to keep both DDS's synchronized so they stay 90 
deg off from each other all the time. Too bad Analog Devices doesn't have a 
AD99XX chip that can generate I and Q signal within one chip available  like 
their AD9854 DDS. That will make life much simpler.

73 de DJ/NM3R 



----- Original Message ----
From: iami78 <[EMAIL PROTECTED]>
To: [email protected]
Sent: Thursday, March 15, 2007 2:21:13 AM
Subject: [soft_radio] Re: Single AD9954 with counter or dual AD9954 to form IQ 
VFO.

--- In [EMAIL PROTECTED] ups.com, "D. J. Wang" <[EMAIL PROTECTED] > wrote:
>
>Hi Janne, 
>To avoid the spurs from DDS altogether it may be easier to use a
>PLL/VCO instead. I was planning to build a 400-900 MHz PLL to drive
the >SDR hardware but I don't have time to do it. Freq resolution of
this >PLL doesn't need to be high since Winrad can cover a 48-192KHz
window. >PLL step size can be in the range of 200KHz. It may be easier
to build >than the DDS. Minicircuit Labs' POS-900W VCO will be a good
choice for >this. I am not sure whether you can find a 7474 type of
flipflop fast >enough to cover the freq range you need as it need to
be able to divide >200MHz clock.
> 
> 73 de DJ/NM3R

Hi DJ!

So, you mean that DDS step accuracy is unnecessary because you can
adjust the frequency within the bandwidth of Winrad screen? But, lets
imagine that you want to adjust the frequency linearly all the time. I
mean, you want to search HF FAX transmission at the 5-10MHz area,
doesn't it just always jump in 200 kHz steps and then you have do a
the adjustment in the Winrad window? If so, it sounds a bit difficult
way. Well, if you can write proper software for it, then there is no
problem, I know I cant :)

Anyways, I think I'm gonna stick with the 'ordinary' DDS way - just
two AD9954 to form I/Q, fed with pure high frequency signal. I think
that will give pretty low spur levels, like mentioned earlier. Or do
you think it's not clean enough? I really don't know since this is my
first time wit DDS!

73 de Janne, OH1GTF





 
____________________________________________________________________________________
No need to miss a message. Get email on-the-go 
with Yahoo! Mail for Mobile. Get started.
http://mobile.yahoo.com/mail 

[Non-text portions of this message have been removed]

Reply via email to