US-WA-Lynnwood: Test Engineer To apply for this position, please visit this Website. http://sqa.fyicenter.com/jobs/99670120_Test_Engineer.html To see other opportunities, please visit http://sqa.fyicenter.com Date: 21-Jan-2011
Engineer III, Test · Testability: Work in tandem with the HW design engineer to ensure that test coverage and testability issues are addressed as part of the design process. · Test strategy (ICT, FTP, ATP, ESS, etc.): Develop and document the overall test strategy for the product. The test strategy will include a test coverage goal for each stage of production. · Peer reviews: Attend all hardware design peer reviews and be responsible for ensuring testability of the design that is aligned with the overall test strategy. As part of this activity, the test engineer will have the responsibility to fill out the schematic capture checklist for testability, and assess the need for any updates or improvements to the checklist. · Templates and checklists: Develop FTP/ATP/ESS templates to be used on all programs. The templates will include standard test methodologies for each circuit block and tailored to each application during development; Develop and document checklists for the FTP/ATP/ESS. · Test Documents: Responsible for defining the content of the FTP/ATP/ESS procedures to insure proper test coverage. · Test coverage analysis: Responsible for completing the test coverage analysis. This effort involves updating the FMEA database with testability data from each phase of production, producing the test coverage report, and providing feedback into the procedures for any required test improvements. · Resident Maintenance Software: Responsible for developing a standard for RMS, and documenting it in a DOORs module for use in other programs. During PDP, this effort will involve tailoring RMS to the program, including updating HW/SW interface requirements, verifying RMS performance during initial checkout of the hardware, and working with software engineering for formal verification of RMS. · Design Verification Testing: Participate in DVT of the electronics by writing the DVT procedure, ensuring test equipment functionality, helping perform the tests if necessary, ensuring redlines to the preliminary QTP gets incorporated properly, and documenting the DVT results. Develop QTPL and QTP/QTR documents for the product. · Test Equipment Development: Participate in test equipment development, including requirements definition, design and verification, using schematic capture tools, LabView, and TestStand. Minimum Requirements: · Experience: 5+ years experience in hardware test engineering, preferably in an aerospace related product field. · · Education/Certification: Bachelor’s degree in Electrical Engineering or other related science/engineering field or equivalent work experience. · Thank you, Team SQAFYI - Software QA Resource FYI http://sqa.fyicenter.com -- You received this message because you are subscribed to the Google Groups "Software Quality Assurance Center" group. To post to this group, send email to [email protected]. To unsubscribe from this group, send email to [email protected]. For more options, visit this group at http://groups.google.com/group/software_qa_center?hl=en.
