On Wed, Mar 31, 2010 at 02:03:11PM -0400, Michael wrote: > On Mar 31, 2010, at 10:45 AM, David Young wrote: > >I wonder, does the device need the read, or is the bus_space_barrier() > >insufficient to flush the write to the device? > > I thave no idea. It works without the read on some machines - might be > a quirk in the Blade 2500's hardware. Either way we can probably get > rid of the bus_space_barrier().
The barrier here just makes sure the write that just happened will be completed before the next write operation to the same register. It does not have any influence on the write you added. It might make sense to move the read past the barrier and modify that to be BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE. Or try the modified barrier w/o the added read - maybe that is already enough. However, if your pci bridge is not very wiered I doubt that this is the problem - i.e. my bet would be on the device requiring a small delay or actually the read cycle. Martin
