On Wed Jan 26 2011 at 19:48:52 +0900, Izumi Tsutsui wrote: > > > > + * Make a kernel mapping valid for I/O, e.g. non-cachable. > > > > + * Alignment and length constraints are as-if NBPG==PAGE_SIZE. > : > > > What is this miracle, however? > > > > IIRC that miracle is about mapping the flash which is not in kseg1. > > The story included lots of details on how mapping an arbitrary physical > > address was much easier on Mach ;) > > Why not simply using bus_space(9) for non-cachable I/O? > (like sys/arch/arc/arc/bus_space_sparse.c)
I think the reason for not using was bus space was the lack of an MI tag for physmem. That said, I don't mind if someone wants to convert the driver to dance around bus space or do other kinds of maintenance. -- älä karot toivorikkauttas, kyl rätei ja lumpui piisaa