Module Name: src
Committed By: martin
Date: Thu Aug 1 14:24:21 UTC 2019
Modified Files:
src/sys/dev/mii [netbsd-8]: miidevs.h miidevs_data.h
Log Message:
regen for ticket #1315
To generate a diff of this commit:
cvs rdiff -u -r1.128.6.5 -r1.128.6.6 src/sys/dev/mii/miidevs.h
cvs rdiff -u -r1.116.6.5 -r1.116.6.6 src/sys/dev/mii/miidevs_data.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/mii/miidevs.h
diff -u src/sys/dev/mii/miidevs.h:1.128.6.5 src/sys/dev/mii/miidevs.h:1.128.6.6
--- src/sys/dev/mii/miidevs.h:1.128.6.5 Thu Mar 7 17:17:09 2019
+++ src/sys/dev/mii/miidevs.h Thu Aug 1 14:24:21 2019
@@ -1,10 +1,10 @@
-/* $NetBSD: miidevs.h,v 1.128.6.5 2019/03/07 17:17:09 martin Exp $ */
+/* $NetBSD: miidevs.h,v 1.128.6.6 2019/08/01 14:24:21 martin Exp $ */
/*
* THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
*
* generated from:
- * NetBSD: miidevs,v 1.125.6.5 2019/03/07 17:16:40 martin Exp
+ * NetBSD: miidevs,v 1.125.6.6 2019/08/01 14:22:55 martin Exp
*/
/*-
@@ -62,6 +62,8 @@
#define MII_OUI_DATATRACK 0x0002c6 /* Data Track Technology */
#define MII_OUI_CICADA 0x0003f1 /* Cicada Semiconductor */
#define MII_OUI_AGERE 0x00053d /* Agere */
+#define MII_OUI_BANKSPEED 0x0006b8 /* Bankspeed Pty */
+#define MII_OUI_NETEXCELL 0x0008bb /* NetExcell */
#define MII_OUI_NETAS 0x0009c3 /* Netas */
#define MII_OUI_BROADCOM2 0x000af7 /* Broadcom Corporation */
#define MII_OUI_RALINK 0x000c43 /* Ralink Technology */
@@ -78,6 +80,7 @@
#define MII_OUI_VIA 0x004063 /* VIA Technologies */
#define MII_OUI_MARVELL 0x005043 /* Marvell Semiconductor */
#define MII_OUI_QUALSEMI 0x006051 /* Quality Semiconductor */
+#define MII_OUI_AMLOGIC 0x006051 /* Amlogic */
#define MII_OUI_DAVICOM 0x00606e /* Davicom Semiconductor */
#define MII_OUI_SMSC 0x00800f /* SMSC */
#define MII_OUI_ICPLUS 0x0090c3 /* IC Plus Corp. */
@@ -98,35 +101,29 @@
#define MII_OUI_TI 0x080028 /* Texas Instruments */
#define MII_OUI_BROADCOM4 0x18c086 /* Broadcom Corporation */
-/* Some Intel 82553's use an alternative OUI. */
-#define MII_OUI_xxINTEL 0x001f00 /* Intel */
-
-/* Some VIA 6122's use an alternative OUI. */
-#define MII_OUI_xxCICADA 0x00c08f /* Cicada Semiconductor */
-
-/* bad bitorder (bits "g" and "h" (= MSBs byte 1) lost) */
+/* Unregisterd or wrong OUI */
+#define MII_OUI_yyREALTEK 0x000004 /* Realtek */
#define MII_OUI_yyAMD 0x000058 /* Advanced Micro Devices */
+#define MII_OUI_xxMYSON 0x00032d /* Myson Technology */
+#define MII_OUI_xxTSC 0x00039c /* TDK Semiconductor */
+#define MII_OUI_xxASIX 0x000674 /* Asix Semiconductor */
+#define MII_OUI_xxDAVICOM 0x000676 /* Davicom Semiconductor */
+#define MII_OUI_xxAMLOGIC 0x00068a /* Amlogic */
+#define MII_OUI_xxQUALSEMI 0x00068a /* Quality Semiconductor */
+#define MII_OUI_xxREALTEK 0x000732 /* Realtek */
#define MII_OUI_xxBROADCOM 0x000818 /* Broadcom Corporation */
+#define MII_OUI_xxPMCSIERRA 0x0009c0 /* PMC-Sierra */
+#define MII_OUI_xxMARVELL 0x000ac2 /* Marvell Semiconductor */
+#define MII_OUI_xxINTEL 0x001f00 /* Intel */
#define MII_OUI_xxBROADCOM_ALT1 0x0050ef /* Broadcom Corporation */
-#define MII_OUI_xxDAVICOM 0x000676 /* Davicom Semiconductor */
#define MII_OUI_yyINTEL 0x005500 /* Intel */
-#define MII_OUI_xxMARVELL 0x000ac2 /* Marvell Semiconductor */
-#define MII_OUI_xxMYSON 0x00032d /* Myson Technology */
+#define MII_OUI_yyASIX 0x007063 /* Asix Semiconductor */
+#define MII_OUI_xxPMCSIERRA2 0x009057 /* PMC-Sierra */
+#define MII_OUI_xxCICADA 0x00c08f /* Cicada Semiconductor */
#define MII_OUI_xxNATSEMI 0x1000e8 /* National Semiconductor */
-#define MII_OUI_xxQUALSEMI 0x00068a /* Quality Semiconductor */
-#define MII_OUI_xxTSC 0x00039c /* TDK Semiconductor */
-
-/* bad byteorder (bits "q" and "r" (= LSBs byte 3) lost) */
#define MII_OUI_xxLEVEL1 0x782000 /* Level 1 */
#define MII_OUI_xxXAQTI 0xace000 /* XaQti Corp. */
-/* Don't know what's going on here. */
-#define MII_OUI_xxASIX 0x000674 /* Asix Semiconductor */
-#define MII_OUI_xxPMCSIERRA 0x0009c0 /* PMC-Sierra */
-#define MII_OUI_xxPMCSIERRA2 0x009057 /* PMC-Sierra */
-
-#define MII_OUI_xxREALTEK 0x000732 /* Realtek */
-#define MII_OUI_yyREALTEK 0x000004 /* Realtek */
/*
* List of known models. Grouped by oui.
*/
@@ -140,6 +137,12 @@
/* Asix semiconductor PHYs */
#define MII_MODEL_xxASIX_AX88X9X 0x0031
#define MII_STR_xxASIX_AX88X9X "Ax88x9x internal PHY"
+#define MII_MODEL_yyASIX_AX88772 0x0001
+#define MII_STR_yyASIX_AX88772 "AX88772 internal PHY"
+#define MII_MODEL_yyASIX_AX88772A 0x0006
+#define MII_STR_yyASIX_AX88772A "AX88772A internal PHY"
+#define MII_MODEL_yyASIX_AX88772B 0x0008
+#define MII_STR_yyASIX_AX88772B "AX88772B internal PHY"
/* Altima Communications PHYs */
/* Don't know the model for ACXXX */
@@ -155,6 +158,12 @@
#define MII_MODEL_ALTIMA_Am79C874 0x0021
#define MII_STR_ALTIMA_Am79C874 "Am79C874 10/100 media interface"
+/* Amlogic PHYs */
+#define MII_MODEL_AMLOGIC_GXL 0x0000
+#define MII_STR_AMLOGIC_GXL "Meson GXL internal PHY"
+#define MII_MODEL_xxAMLOGIC_GXL 0x0000
+#define MII_STR_xxAMLOGIC_GXL "Meson GXL internal PHY"
+
/* Atheros PHYs */
#define MII_MODEL_ATHEROS_F1 0x0001
#define MII_STR_ATHEROS_F1 "F1 10/100/1000 PHY"
@@ -285,13 +294,15 @@
#define MII_STR_BROADCOM3_BCM5719C "BCM5719C 1000BASE-T media interface"
#define MII_MODEL_BROADCOM3_BCM57765 0x0024
#define MII_STR_BROADCOM3_BCM57765 "BCM57765 1000BASE-T media interface"
+#define MII_MODEL_BROADCOM3_BCM53125 0x0032
+#define MII_STR_BROADCOM3_BCM53125 "BCM53125 1000BASE-T switch"
#define MII_MODEL_BROADCOM3_BCM5720C 0x0036
#define MII_STR_BROADCOM3_BCM5720C "BCM5720C 1000BASE-T media interface"
#define MII_MODEL_BROADCOM4_BCM5725C 0x0038
#define MII_STR_BROADCOM4_BCM5725C "BCM5725C 1000BASE-T media interface"
#define MII_MODEL_xxBROADCOM_ALT1_BCM5906 0x0004
#define MII_STR_xxBROADCOM_ALT1_BCM5906 "BCM5906 10/100baseTX media interface"
-
+
/* Cicada Semiconductor PHYs (now owned by Vitesse?) */
#define MII_MODEL_CICADA_CS8201 0x0001
#define MII_STR_CICADA_CS8201 "Cicada CS8201 10/100/1000TX PHY"
@@ -318,6 +329,14 @@
#define MII_STR_xxDAVICOM_DM9101 "DM9101 (AMD Am79C873) 10/100 media interface"
#define MII_MODEL_xxDAVICOM_DM9102 0x0004
#define MII_STR_xxDAVICOM_DM9102 "DM9102 10/100 media interface"
+#define MII_MODEL_xxDAVICOM_DM9161 0x0008
+#define MII_STR_xxDAVICOM_DM9161 "DM9161 10/100 media interface"
+#define MII_MODEL_xxDAVICOM_DM9161A 0x000a
+#define MII_STR_xxDAVICOM_DM9161A "DM9161A 10/100 media interface"
+#define MII_MODEL_xxDAVICOM_DM9161B 0x000b
+#define MII_STR_xxDAVICOM_DM9161B "DM9161[BC] 10/100 media interface"
+#define MII_MODEL_xxDAVICOM_DM9601 0x000c
+#define MII_STR_xxDAVICOM_DM9601 "DM9601 internal 10/100 media interface"
/* IC Plus Corp. PHYs */
#define MII_MODEL_ICPLUS_IP100 0x0004
@@ -380,8 +399,8 @@
#define MII_STR_xxMARVELL_I210 "I210 10/100/1000 media interface"
#define MII_MODEL_xxMARVELL_I82563 0x000a
#define MII_STR_xxMARVELL_I82563 "i82563 10/100/1000 media interface"
-#define MII_MODEL_ATHEROS_I82578 0x0004
-#define MII_STR_ATHEROS_I82578 "Intel 82578 10/100/1000 media interface"
+#define MII_MODEL_ATTANSIC_I82578 0x0004
+#define MII_STR_ATTANSIC_I82578 "Intel 82578 10/100/1000 media interface"
/* JMicron PHYs */
@@ -547,6 +566,10 @@
#define MII_STR_SMSC_LAN83C185 "SMSC LAN83C185 10/100 PHY"
#define MII_MODEL_SMSC_LAN8700 0x000c
#define MII_STR_SMSC_LAN8700 "SMSC LAN8700 10/100 Ethernet Transceiver"
+#define MII_MODEL_SMSC_LAN911X 0x000d
+#define MII_STR_SMSC_LAN911X "SMSC LAN911X internal 10/100 PHY"
+#define MII_MODEL_SMSC_LAN75XX 0x000e
+#define MII_STR_SMSC_LAN75XX "SMSC LAN75XX internal 10/100 PHY"
#define MII_MODEL_SMSC_LAN8710_LAN8720 0x000f
#define MII_STR_SMSC_LAN8710_LAN8720 "SMSC LAN8710/LAN8720 10/100 Ethernet Transceiver"
#define MII_MODEL_SMSC_LAN8740 0x0011
Index: src/sys/dev/mii/miidevs_data.h
diff -u src/sys/dev/mii/miidevs_data.h:1.116.6.5 src/sys/dev/mii/miidevs_data.h:1.116.6.6
--- src/sys/dev/mii/miidevs_data.h:1.116.6.5 Thu Mar 7 17:17:09 2019
+++ src/sys/dev/mii/miidevs_data.h Thu Aug 1 14:24:21 2019
@@ -1,10 +1,10 @@
-/* $NetBSD: miidevs_data.h,v 1.116.6.5 2019/03/07 17:17:09 martin Exp $ */
+/* $NetBSD: miidevs_data.h,v 1.116.6.6 2019/08/01 14:24:21 martin Exp $ */
/*
* THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
*
* generated from:
- * NetBSD: miidevs,v 1.125.6.5 2019/03/07 17:16:40 martin Exp
+ * NetBSD: miidevs,v 1.125.6.6 2019/08/01 14:22:55 martin Exp
*/
/*-
@@ -39,11 +39,16 @@
struct mii_knowndev mii_knowndevs[] = {
{ MII_OUI_AGERE, MII_MODEL_AGERE_ET1011, MII_STR_AGERE_ET1011 },
{ MII_OUI_xxASIX, MII_MODEL_xxASIX_AX88X9X, MII_STR_xxASIX_AX88X9X },
+ { MII_OUI_yyASIX, MII_MODEL_yyASIX_AX88772, MII_STR_yyASIX_AX88772 },
+ { MII_OUI_yyASIX, MII_MODEL_yyASIX_AX88772A, MII_STR_yyASIX_AX88772A },
+ { MII_OUI_yyASIX, MII_MODEL_yyASIX_AX88772B, MII_STR_yyASIX_AX88772B },
{ MII_OUI_ALTIMA, MII_MODEL_ALTIMA_ACXXX, MII_STR_ALTIMA_ACXXX },
{ MII_OUI_ALTIMA, MII_MODEL_ALTIMA_AC101L, MII_STR_ALTIMA_AC101L },
{ MII_OUI_ALTIMA, MII_MODEL_ALTIMA_AC101, MII_STR_ALTIMA_AC101 },
{ MII_OUI_ALTIMA, MII_MODEL_ALTIMA_Am79C875, MII_STR_ALTIMA_Am79C875 },
{ MII_OUI_ALTIMA, MII_MODEL_ALTIMA_Am79C874, MII_STR_ALTIMA_Am79C874 },
+ { MII_OUI_AMLOGIC, MII_MODEL_AMLOGIC_GXL, MII_STR_AMLOGIC_GXL },
+ { MII_OUI_xxAMLOGIC, MII_MODEL_xxAMLOGIC_GXL, MII_STR_xxAMLOGIC_GXL },
{ MII_OUI_ATHEROS, MII_MODEL_ATHEROS_F1, MII_STR_ATHEROS_F1 },
{ MII_OUI_ATHEROS, MII_MODEL_ATHEROS_F2, MII_STR_ATHEROS_F2 },
{ MII_OUI_ATTANSIC, MII_MODEL_ATTANSIC_L1, MII_STR_ATTANSIC_L1 },
@@ -105,6 +110,7 @@ struct mii_knowndev mii_knowndevs[] = {
{ MII_OUI_BROADCOM3, MII_MODEL_BROADCOM3_BCM5717C, MII_STR_BROADCOM3_BCM5717C },
{ MII_OUI_BROADCOM3, MII_MODEL_BROADCOM3_BCM5719C, MII_STR_BROADCOM3_BCM5719C },
{ MII_OUI_BROADCOM3, MII_MODEL_BROADCOM3_BCM57765, MII_STR_BROADCOM3_BCM57765 },
+ { MII_OUI_BROADCOM3, MII_MODEL_BROADCOM3_BCM53125, MII_STR_BROADCOM3_BCM53125 },
{ MII_OUI_BROADCOM3, MII_MODEL_BROADCOM3_BCM5720C, MII_STR_BROADCOM3_BCM5720C },
{ MII_OUI_BROADCOM4, MII_MODEL_BROADCOM4_BCM5725C, MII_STR_BROADCOM4_BCM5725C },
{ MII_OUI_xxBROADCOM_ALT1, MII_MODEL_xxBROADCOM_ALT1_BCM5906, MII_STR_xxBROADCOM_ALT1_BCM5906 },
@@ -119,6 +125,10 @@ struct mii_knowndev mii_knowndevs[] = {
{ MII_OUI_DAVICOM, MII_MODEL_DAVICOM_DM9101, MII_STR_DAVICOM_DM9101 },
{ MII_OUI_xxDAVICOM, MII_MODEL_xxDAVICOM_DM9101, MII_STR_xxDAVICOM_DM9101 },
{ MII_OUI_xxDAVICOM, MII_MODEL_xxDAVICOM_DM9102, MII_STR_xxDAVICOM_DM9102 },
+ { MII_OUI_xxDAVICOM, MII_MODEL_xxDAVICOM_DM9161, MII_STR_xxDAVICOM_DM9161 },
+ { MII_OUI_xxDAVICOM, MII_MODEL_xxDAVICOM_DM9161A, MII_STR_xxDAVICOM_DM9161A },
+ { MII_OUI_xxDAVICOM, MII_MODEL_xxDAVICOM_DM9161B, MII_STR_xxDAVICOM_DM9161B },
+ { MII_OUI_xxDAVICOM, MII_MODEL_xxDAVICOM_DM9601, MII_STR_xxDAVICOM_DM9601 },
{ MII_OUI_ICPLUS, MII_MODEL_ICPLUS_IP100, MII_STR_ICPLUS_IP100 },
{ MII_OUI_ICPLUS, MII_MODEL_ICPLUS_IP101, MII_STR_ICPLUS_IP101 },
{ MII_OUI_ICPLUS, MII_MODEL_ICPLUS_IP1000A, MII_STR_ICPLUS_IP1000A },
@@ -147,7 +157,7 @@ struct mii_knowndev mii_knowndevs[] = {
{ MII_OUI_INTEL, MII_MODEL_INTEL_I350, MII_STR_INTEL_I350 },
{ MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_I210, MII_STR_xxMARVELL_I210 },
{ MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_I82563, MII_STR_xxMARVELL_I82563 },
- { MII_OUI_ATHEROS, MII_MODEL_ATHEROS_I82578, MII_STR_ATHEROS_I82578 },
+ { MII_OUI_ATTANSIC, MII_MODEL_ATTANSIC_I82578, MII_STR_ATTANSIC_I82578 },
{ MII_OUI_JMICRON, MII_MODEL_JMICRON_JMC250, MII_STR_JMICRON_JMC250 },
{ MII_OUI_JMICRON, MII_MODEL_JMICRON_JMC260, MII_STR_JMICRON_JMC260 },
{ MII_OUI_xxLEVEL1, MII_MODEL_xxLEVEL1_LXT970, MII_STR_xxLEVEL1_LXT970 },
@@ -217,6 +227,8 @@ struct mii_knowndev mii_knowndevs[] = {
{ MII_OUI_SIS, MII_MODEL_SIS_900, MII_STR_SIS_900 },
{ MII_OUI_SMSC, MII_MODEL_SMSC_LAN83C185, MII_STR_SMSC_LAN83C185 },
{ MII_OUI_SMSC, MII_MODEL_SMSC_LAN8700, MII_STR_SMSC_LAN8700 },
+ { MII_OUI_SMSC, MII_MODEL_SMSC_LAN911X, MII_STR_SMSC_LAN911X },
+ { MII_OUI_SMSC, MII_MODEL_SMSC_LAN75XX, MII_STR_SMSC_LAN75XX },
{ MII_OUI_SMSC, MII_MODEL_SMSC_LAN8710_LAN8720, MII_STR_SMSC_LAN8710_LAN8720 },
{ MII_OUI_SMSC, MII_MODEL_SMSC_LAN8740, MII_STR_SMSC_LAN8740 },
{ MII_OUI_SMSC, MII_MODEL_SMSC_LAN8741A, MII_STR_SMSC_LAN8741A },
