Module Name: src Committed By: msaitoh Date: Thu Oct 3 15:36:24 UTC 2019
Modified Files: src/sys/arch/acorn32/acorn32: rpc_machdep.c src/sys/arch/arm/mpcore: mpcorereg.h Log Message: s/0x0x/0x/ To generate a diff of this commit: cvs rdiff -u -r1.93 -r1.94 src/sys/arch/acorn32/acorn32/rpc_machdep.c cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/mpcore/mpcorereg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
Modified files: Index: src/sys/arch/acorn32/acorn32/rpc_machdep.c diff -u src/sys/arch/acorn32/acorn32/rpc_machdep.c:1.93 src/sys/arch/acorn32/acorn32/rpc_machdep.c:1.94 --- src/sys/arch/acorn32/acorn32/rpc_machdep.c:1.93 Tue Jul 16 14:41:43 2019 +++ src/sys/arch/acorn32/acorn32/rpc_machdep.c Thu Oct 3 15:36:24 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: rpc_machdep.c,v 1.93 2019/07/16 14:41:43 skrll Exp $ */ +/* $NetBSD: rpc_machdep.c,v 1.94 2019/10/03 15:36:24 msaitoh Exp $ */ /* * Copyright (c) 2000-2002 Reinoud Zandijk. @@ -55,7 +55,7 @@ #include <sys/param.h> -__KERNEL_RCSID(0, "$NetBSD: rpc_machdep.c,v 1.93 2019/07/16 14:41:43 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: rpc_machdep.c,v 1.94 2019/10/03 15:36:24 msaitoh Exp $"); #include <sys/systm.h> #include <sys/kernel.h> @@ -518,7 +518,7 @@ initarm(void *cookie) #endif for (loop = 0, physmem = 0; loop < bootconfig.dramblocks; ++loop) { #ifdef VERBOSE_INIT_ARM - printf("0x0x%x + 0x%0x, type = 0x%08x\n", bootconfig.dram[loop].address, + printf("0x%x + 0x%0x, type = 0x%08x\n", bootconfig.dram[loop].address, bootconfig.dram[loop].pages * PAGE_SIZE, bootconfig.dram[loop].flags); #endif Index: src/sys/arch/arm/mpcore/mpcorereg.h diff -u src/sys/arch/arm/mpcore/mpcorereg.h:1.1 src/sys/arch/arm/mpcore/mpcorereg.h:1.2 --- src/sys/arch/arm/mpcore/mpcorereg.h:1.1 Thu Mar 10 07:47:15 2011 +++ src/sys/arch/arm/mpcore/mpcorereg.h Thu Oct 3 15:36:24 2019 @@ -32,7 +32,7 @@ */ #define MPCORE_PMR_SCU 0x0000 #define MPCORE_PMR_CII 0x0100 /* CPU Interrupt Interface (for current core) */ -#define MPCORE_PMR_CII_CORE(n) (0x0x200 + 0x100 * (n)) /* for core N */ +#define MPCORE_PMR_CII_CORE(n) (0x200 + 0x100 * (n)) /* for core N */ #define MPCORE_PMR_CII_SIZE 0x100 #define MPCORE_PMR_TIMER 0x600 /* for current core */ #define MPCORE_PMR_TIMER_CORE(n) (0x700 + 0x100 * (n)) /* for core N */