Module Name: src Committed By: msaitoh Date: Fri Oct 20 10:09:44 UTC 2023
Modified Files: src/share/man/man4: eqos.4 src/sys/arch/amd64/conf: GENERIC src/sys/arch/i386/conf: GENERIC src/sys/dev/pci: files.pci Added Files: src/sys/dev/pci: if_eqos_pci.c Log Message: eqos(4): Add initial support for Intel Elkhart Lake internal Ethernet devices. - Only tested on PSE SGMII 1G Ethernet MAC with MaxLinear GPY115. - I don't know why dmat64 doesn't work. eqos_attach() have a special code if EQOS_HW_FEATURE_ADDR64_32BIT(sc) is true, but it seems it doesn't work. - TODO: Multiqueue support. Detach support. To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/share/man/man4/eqos.4 cvs rdiff -u -r1.606 -r1.607 src/sys/arch/amd64/conf/GENERIC cvs rdiff -u -r1.1250 -r1.1251 src/sys/arch/i386/conf/GENERIC cvs rdiff -u -r1.447 -r1.448 src/sys/dev/pci/files.pci cvs rdiff -u -r0 -r1.1 src/sys/dev/pci/if_eqos_pci.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
Modified files: Index: src/share/man/man4/eqos.4 diff -u src/share/man/man4/eqos.4:1.1 src/share/man/man4/eqos.4:1.2 --- src/share/man/man4/eqos.4:1.1 Thu Jan 6 21:55:23 2022 +++ src/share/man/man4/eqos.4 Fri Oct 20 10:09:43 2023 @@ -1,4 +1,4 @@ -.\" $NetBSD: eqos.4,v 1.1 2022/01/06 21:55:23 nia Exp $ +.\" $NetBSD: eqos.4,v 1.2 2023/10/20 10:09:43 msaitoh Exp $ .\" .\" Copyright (c) 2022 The NetBSD Foundation, Inc. .\" All rights reserved. @@ -27,7 +27,7 @@ .\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE .\" POSSIBILITY OF SUCH DAMAGE. .\" -.Dd January 6, 2022 +.Dd October 20, 2023 .Dt EQOS 4 .Os .Sh NAME @@ -35,6 +35,7 @@ .Nd DesignWare Ethernet Quality-of-Service controller .Sh SYNOPSIS .Cd "eqos* at acpi?" +.Cd "eqos* at pci?" .Sh DESCRIPTION The .Nm Index: src/sys/arch/amd64/conf/GENERIC diff -u src/sys/arch/amd64/conf/GENERIC:1.606 src/sys/arch/amd64/conf/GENERIC:1.607 --- src/sys/arch/amd64/conf/GENERIC:1.606 Wed Oct 4 07:48:55 2023 +++ src/sys/arch/amd64/conf/GENERIC Fri Oct 20 10:09:43 2023 @@ -1,4 +1,4 @@ -# $NetBSD: GENERIC,v 1.606 2023/10/04 07:48:55 rin Exp $ +# $NetBSD: GENERIC,v 1.607 2023/10/20 10:09:43 msaitoh Exp $ # # GENERIC machine description file # @@ -22,7 +22,7 @@ include "arch/amd64/conf/std.amd64" options INCLUDE_CONFIG_FILE # embed config file in kernel binary -#ident "GENERIC-$Revision: 1.606 $" +#ident "GENERIC-$Revision: 1.607 $" maxusers 64 # estimated number of users @@ -827,6 +827,7 @@ dge* at pci? dev ? function ? # Intel 82 ena* at pci? dev ? function ? # Amazon.com Elastic Network Adapter ep* at pci? dev ? function ? # 3Com 3c59x epic* at pci? dev ? function ? # SMC EPIC/100 Ethernet +eqos* at pci? dev ? function ? # DesignWare Ethernet QoS et* at pci? dev ? function ? # Agere/LSI ET1310/ET1301 Gigabit ex* at pci? dev ? function ? # 3Com 90x[BC] fxp* at pci? dev ? function ? # Intel EtherExpress PRO 10+/100B Index: src/sys/arch/i386/conf/GENERIC diff -u src/sys/arch/i386/conf/GENERIC:1.1250 src/sys/arch/i386/conf/GENERIC:1.1251 --- src/sys/arch/i386/conf/GENERIC:1.1250 Sun Jul 16 10:20:07 2023 +++ src/sys/arch/i386/conf/GENERIC Fri Oct 20 10:09:44 2023 @@ -1,4 +1,4 @@ -# $NetBSD: GENERIC,v 1.1250 2023/07/16 10:20:07 riastradh Exp $ +# $NetBSD: GENERIC,v 1.1251 2023/10/20 10:09:44 msaitoh Exp $ # # GENERIC machine description file # @@ -22,7 +22,7 @@ include "arch/i386/conf/std.i386" options INCLUDE_CONFIG_FILE # embed config file in kernel binary -#ident "GENERIC-$Revision: 1.1250 $" +#ident "GENERIC-$Revision: 1.1251 $" maxusers 64 # estimated number of users @@ -982,6 +982,7 @@ bwfm* at pci? dev ? function ? # Broadco dge* at pci? dev ? function ? # Intel 82597 10GbE LR ep* at pci? dev ? function ? # 3Com 3c59x epic* at pci? dev ? function ? # SMC EPIC/100 Ethernet +eqos* at pci? dev ? function ? # DesignWare Ethernet QoS et* at pci? dev ? function ? # Agere/LSI ET1310/ET1301 Gigabit ex* at pci? dev ? function ? # 3Com 3c90x[BC] fxp* at pci? dev ? function ? # Intel EtherExpress PRO 10+/100B Index: src/sys/dev/pci/files.pci diff -u src/sys/dev/pci/files.pci:1.447 src/sys/dev/pci/files.pci:1.448 --- src/sys/dev/pci/files.pci:1.447 Wed Oct 4 07:35:27 2023 +++ src/sys/dev/pci/files.pci Fri Oct 20 10:09:43 2023 @@ -1,4 +1,4 @@ -# $NetBSD: files.pci,v 1.447 2023/10/04 07:35:27 rin Exp $ +# $NetBSD: files.pci,v 1.448 2023/10/20 10:09:43 msaitoh Exp $ # # Config file and device description for machine-independent PCI code. # Included by ports that need it. Requires that the SCSI files be @@ -1172,6 +1172,10 @@ file dev/pci/if_ena.c ena file external/bsd/ena-com/ena_com.c ena file external/bsd/ena-com/ena_eth_com.c ena +# PCI based DesignWare Ethernet QoS +attach eqos at pci with eqos_pci +file dev/pci/if_eqos_pci.c eqos_pci + # Intel QuickAssist device qat: opencrypto, firmload attach qat at pci Added files: Index: src/sys/dev/pci/if_eqos_pci.c diff -u /dev/null src/sys/dev/pci/if_eqos_pci.c:1.1 --- /dev/null Fri Oct 20 10:09:44 2023 +++ src/sys/dev/pci/if_eqos_pci.c Fri Oct 20 10:09:43 2023 @@ -0,0 +1,182 @@ +/* $NetBSD: if_eqos_pci.c,v 1.1 2023/10/20 10:09:43 msaitoh Exp $ */ + +/*- + * Copyright (c) 2023 Masanobu SAITOH <msai...@netbsd.org> + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * TODO: + * Use multi vector MSI to support multiqueue. + * + */ + +#include "opt_net_mpsafe.h" + +#include <sys/cdefs.h> +__KERNEL_RCSID(0, "$NetBSD: if_eqos_pci.c,v 1.1 2023/10/20 10:09:43 msaitoh Exp $"); + +#include <sys/param.h> +#include <sys/bus.h> +#include <sys/device.h> +#include <sys/rndsource.h> + +#include <net/if_ether.h> +#include <net/if_media.h> + +#include <dev/pci/pcireg.h> +#include <dev/pci/pcivar.h> +#include <dev/pci/pcidevs.h> + +#include <dev/mii/miivar.h> +#include <dev/ic/dwc_eqos_var.h> + +#define EQOS_PCI_MAX_INTR 1 + +static int eqos_pci_match(device_t, cfdata_t, void *); +static void eqos_pci_attach(device_t, device_t, void *); + +struct eqos_pci_softc { + struct eqos_softc sc_eqos; + pci_chipset_tag_t sc_pc; + pcitag_t sc_tag; + void *sc_ihs[EQOS_PCI_MAX_INTR]; + pci_intr_handle_t *sc_intrs; + uint16_t sc_pcidevid; +}; + +static const struct device_compatible_entry compat_data[] = { + { .id = PCI_ID_CODE(PCI_VENDOR_INTEL, + PCI_PRODUCT_INTEL_EHL_ETH) }, + { .id = PCI_ID_CODE(PCI_VENDOR_INTEL, + PCI_PRODUCT_INTEL_EHL_PSE_ETH_0_RGMII) }, + { .id = PCI_ID_CODE(PCI_VENDOR_INTEL, + PCI_PRODUCT_INTEL_EHL_PSE_ETH_1_RGMII) }, + { .id = PCI_ID_CODE(PCI_VENDOR_INTEL, + PCI_PRODUCT_INTEL_EHL_PSE_ETH_0_SGMII_1G) }, + { .id = PCI_ID_CODE(PCI_VENDOR_INTEL, + PCI_PRODUCT_INTEL_EHL_PSE_ETH_1_SGMII_1G) }, + { .id = PCI_ID_CODE(PCI_VENDOR_INTEL, + PCI_PRODUCT_INTEL_EHL_PSE_ETH_0_SGMII_2_5G) }, + { .id = PCI_ID_CODE(PCI_VENDOR_INTEL, + PCI_PRODUCT_INTEL_EHL_PSE_ETH_1_SGMII_2_5G) }, + + PCI_COMPAT_EOL +}; + +CFATTACH_DECL3_NEW(eqos_pci, sizeof(struct eqos_pci_softc), + eqos_pci_match, eqos_pci_attach, NULL, NULL, NULL, NULL, + 0); + +static int +eqos_pci_match(device_t parent, cfdata_t match, void *aux) +{ + struct pci_attach_args *pa =aux; + + return pci_compatible_match(pa, compat_data); +} + +static void +eqos_pci_attach(device_t parent, device_t self, void *aux) +{ + struct eqos_pci_softc * const psc = device_private(self); + struct eqos_softc * const sc = &psc->sc_eqos; + struct pci_attach_args *pa =aux; + const pci_chipset_tag_t pc = pa->pa_pc; + const pcitag_t tag = pa->pa_tag; + bus_space_tag_t memt; + bus_space_handle_t memh; + int counts[PCI_INTR_TYPE_SIZE]; + char intrbuf[PCI_INTRSTR_LEN]; + bus_size_t memsize; + pcireg_t memtype; + const char *intrstr; + + psc->sc_pc = pc; + psc->sc_tag = tag; + psc->sc_pcidevid = PCI_PRODUCT(pa->pa_id); + + memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_BAR0); + if (pci_mapreg_map(pa, PCI_BAR0, memtype, 0, &memt, &memh, NULL, + &memsize) != 0) { + aprint_error(": can't map mem space\n"); + return; + } + sc->sc_dev = self; + sc->sc_bst = memt; + sc->sc_bsh = memh; + +#if 0 /* I don't know why dmat64 doesn't work... */ + if (pci_dma64_available(pa)) { + aprint_verbose(", 64-bit DMA"); + sc->sc_dmat = pa->pa_dmat64; + } else { + aprint_verbose(", 32-bit DMA"); + sc->sc_dmat = pa->pa_dmat; + } +#else + sc->sc_dmat = pa->pa_dmat; +#endif + sc->sc_phy_id = MII_PHY_ANY; + switch (psc->sc_pcidevid) { + case PCI_PRODUCT_INTEL_EHL_ETH: + sc->sc_csr_clock = 204800000; + break; + case PCI_PRODUCT_INTEL_EHL_PSE_ETH_0_RGMII: + case PCI_PRODUCT_INTEL_EHL_PSE_ETH_1_RGMII: + case PCI_PRODUCT_INTEL_EHL_PSE_ETH_0_SGMII_1G: + case PCI_PRODUCT_INTEL_EHL_PSE_ETH_1_SGMII_1G: + case PCI_PRODUCT_INTEL_EHL_PSE_ETH_0_SGMII_2_5G: + case PCI_PRODUCT_INTEL_EHL_PSE_ETH_1_SGMII_2_5G: + sc->sc_csr_clock = 200000000; + break; + default: + sc->sc_csr_clock = 200000000; /* XXX */ + } + if (eqos_attach(sc) != 0) { + aprint_error_dev(sc->sc_dev, "failed in eqos_attach()\n"); + return; + } + + /* Allocation settings */ + counts[PCI_INTR_TYPE_MSI] = 1; + counts[PCI_INTR_TYPE_INTX] = 1; + if (pci_intr_alloc(pa, &psc->sc_intrs, counts, PCI_INTR_TYPE_MSI) != 0) + { + aprint_error_dev(sc->sc_dev, "failed to allocate interrupt\n"); + return; + } + intrstr = pci_intr_string(pc, psc->sc_intrs[0], intrbuf, + sizeof(intrbuf)); + pci_intr_setattr(pc, &psc->sc_intrs[0], PCI_INTR_MPSAFE, true); + psc->sc_ihs[0] = pci_intr_establish_xname(pc, psc->sc_intrs[0], + IPL_NET, eqos_intr, sc, device_xname(self)); + + aprint_normal_dev(self, "interrupting on %s\n", intrstr); + + if (pmf_device_register(self, NULL, NULL)) + pmf_class_network_register(self, &sc->sc_ec.ec_if); + else + aprint_error_dev(self, "couldn't establish power handler\n"); +}