Module Name:    src
Committed By:   matt
Date:           Sun Aug  9 05:36:22 UTC 2009

Modified Files:
        src/sys/arch/mips/mips: mipsX_subr.S

Log Message:
Use PGSHIFT + 1 instead hardcoding 13.
Don't set Page Mask to 0 when invalidating a TLB entry.


To generate a diff of this commit:
cvs rdiff -u -r1.29 -r1.30 src/sys/arch/mips/mips/mipsX_subr.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/mips/mips/mipsX_subr.S
diff -u src/sys/arch/mips/mips/mipsX_subr.S:1.29 src/sys/arch/mips/mips/mipsX_subr.S:1.30
--- src/sys/arch/mips/mips/mipsX_subr.S:1.29	Sun Aug  9 04:08:14 2009
+++ src/sys/arch/mips/mips/mipsX_subr.S	Sun Aug  9 05:36:22 2009
@@ -1,4 +1,4 @@
-/*	$NetBSD: mipsX_subr.S,v 1.29 2009/08/09 04:08:14 matt Exp $	*/
+/*	$NetBSD: mipsX_subr.S,v 1.30 2009/08/09 05:36:22 matt Exp $	*/
 
 /*
  * Copyright 2002 Wasabi Systems, Inc.
@@ -2070,7 +2070,7 @@
 	mfc0	s0, MIPS_COP_0_TLB_INDEX
 	nop
 	bltz	s0, entry0set
-	sll	s0, s0, 13			# PAGE_SHIFT + 1
+	sll	s0, s0, PGSHIFT + 1		# PAGE_SHIFT + 1
 	la	s0, MIPS_KSEG0_START(s0)
 	_MTC0	s0, MIPS_COP_0_TLB_HI
 	COP0_SYNC
@@ -2134,7 +2134,7 @@
 	#nop					# -slip-
 	bltz	v0, 1f				# index < 0 then skip
 	li	t1, MIPS_KSEG0_START		# invalid address
-	sll	v0, v0, 13			# PAGE_SHIFT + 1
+	sll	v0, v0, PGSHIFT + 1		# PAGE_SHIFT + 1
 	addu	t1, t1, v0
 	_MTC0	t1, MIPS_COP_0_TLB_HI		# make entryHi invalid
 	COP0_SYNC
@@ -2142,10 +2142,13 @@
 	COP0_SYNC
 	_MTC0	zero, MIPS_COP_0_TLB_LO1	# zero out entryLo1
 	COP0_SYNC
+#if 0
 	mtc0	zero, MIPS_COP_0_TLB_PG_MASK	# zero out pageMask
 	COP0_SYNC
+#endif
 	nop
 	nop
+
 	tlbwi
 	COP0_SYNC
 	nop
@@ -2182,7 +2185,7 @@
 1:
 	mtc0	t1, MIPS_COP_0_TLB_INDEX	# set index
 	COP0_SYNC
-	sll	ta0, t1, 13			# PAGE_SHIFT + 1
+	sll	ta0, t1, PGSHIFT + 1		# PAGE_SHIFT + 1
 	nop
 	/* XXX simonb: lose this nop for mips32/64? */
 	nop
@@ -2251,7 +2254,7 @@
 1:
 	mtc0	t1, MIPS_COP_0_TLB_INDEX	# set TLBindex
 	COP0_SYNC
-	sll	ta0, t1, 13			# PAGE_SHIFT + 1
+	sll	ta0, t1, PGSHIFT + 1		# PAGE_SHIFT + 1
 	add	ta0, v0, ta0
 	_MTC0	ta0, MIPS_COP_0_TLB_HI		# make entryHi invalid
 	COP0_SYNC

Reply via email to