Module Name:    src
Committed By:   uebayasi
Date:           Sun Aug 23 04:38:34 UTC 2009

Modified Files:
        src/sys/arch/mips/conf [matt-nb5-mips64]: files.mips
        src/sys/arch/mips/mips [matt-nb5-mips64]: db_trace.c trap.c

Log Message:
Make ddb(4) trace work on 64-bit ABIs.

For now:

- Values are shown in 32-bit.
- Only 4 arguments are shown.
- DDB_TRACE (heuristic version) is left as is.

Reviewed By:    matt


To generate a diff of this commit:
cvs rdiff -u -r1.58 -r1.58.24.1 src/sys/arch/mips/conf/files.mips
cvs rdiff -u -r1.35.38.1 -r1.35.38.2 src/sys/arch/mips/mips/db_trace.c
cvs rdiff -u -r1.217.12.3 -r1.217.12.4 src/sys/arch/mips/mips/trap.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/mips/conf/files.mips
diff -u src/sys/arch/mips/conf/files.mips:1.58 src/sys/arch/mips/conf/files.mips:1.58.24.1
--- src/sys/arch/mips/conf/files.mips:1.58	Fri Jan 25 21:12:12 2008
+++ src/sys/arch/mips/conf/files.mips	Sun Aug 23 04:38:34 2009
@@ -1,4 +1,4 @@
-#	$NetBSD: files.mips,v 1.58 2008/01/25 21:12:12 joerg Exp $
+#	$NetBSD: files.mips,v 1.58.24.1 2009/08/23 04:38:34 uebayasi Exp $
 #
 
 defflag	opt_cputype.h		NOFPU
@@ -15,6 +15,8 @@
 					ENABLE_MIPS4_CACHE_R10K
 defflag opt_mips3_wired.h		ENABLE_MIPS3_WIRED_MAP
 
+defflag	opt_ddb.h		DDB_TRACE
+
 file	arch/mips/mips/locore_mips1.S		mips1
 file	arch/mips/mips/locore_mips3.S		mips3 | mips4 | mips32 | mips64
 file	arch/mips/mips/mips3_subr.S		(mips3 | mips4) & !mips3_5900

Index: src/sys/arch/mips/mips/db_trace.c
diff -u src/sys/arch/mips/mips/db_trace.c:1.35.38.1 src/sys/arch/mips/mips/db_trace.c:1.35.38.2
--- src/sys/arch/mips/mips/db_trace.c:1.35.38.1	Fri Aug 21 17:44:08 2009
+++ src/sys/arch/mips/mips/db_trace.c	Sun Aug 23 04:38:34 2009
@@ -1,4 +1,4 @@
-/*	$NetBSD: db_trace.c,v 1.35.38.1 2009/08/21 17:44:08 matt Exp $	*/
+/*	$NetBSD: db_trace.c,v 1.35.38.2 2009/08/23 04:38:34 uebayasi Exp $	*/
 
 /*
  * Mach Operating System
@@ -27,7 +27,9 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: db_trace.c,v 1.35.38.1 2009/08/21 17:44:08 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_trace.c,v 1.35.38.2 2009/08/23 04:38:34 uebayasi Exp $");
+
+#include "opt_ddb.h"
 
 #include <sys/types.h>
 #include <sys/param.h>
@@ -186,7 +188,7 @@
 #define	MIPS_JR_RA	0x03e00008	/* instruction code for jr ra */
 #define	MIPS_JR_K0	0x03400008	/* instruction code for jr k0 */
 #define	MIPS_ERET	0x42000018	/* instruction code for eret */
-	unsigned va, pc, ra, sp, func;
+	register_t va, pc, ra, sp, func;
 	int insn;
 	InstFmt i;
 	int stacksize;
@@ -201,24 +203,24 @@
 		va = pc;
 		do {
 			va -= sizeof(int);
-			insn = *(int *)va;
+			insn = *(int *)(intptr_t)va;
 			if (insn == MIPS_ERET)
 				goto mips3_eret;
 		} while (insn != MIPS_JR_RA && insn != MIPS_JR_K0);
 		va += sizeof(int);
 	mips3_eret:
 		va += sizeof(int);
-		while (*(int *)va == 0x00000000)
+		while (*(int *)(intptr_t)va == 0x00000000)
 			va += sizeof(int);
 		func = va;
 		stacksize = 0;
 		do {
-			i.word = *(int *)va;
-			if (i.IType.op == OP_SW
+			i.word = *(int *)(intptr_t)va;
+			if (((i.IType.op == OP_SW) || (i.IType.op == OP_SD))
 			    && i.IType.rs == _R_SP
 			    && i.IType.rt == _R_RA)
-				ra = *(int *)(sp + (short)i.IType.imm);
-			if (i.IType.op == OP_ADDIU
+				ra = *(int *)(intptr_t)(sp + (short)i.IType.imm);
+			if (((i.IType.op == OP_ADDIU) || (i.IType.op == OP_DADDIU))
 			    && i.IType.rs == _R_SP
 			    && i.IType.rt == _R_SP)
 				stacksize = -(short)i.IType.imm;
@@ -229,7 +231,7 @@
 		if (name == 0)
 			name = "?";
 		(*pr)("%s()+0x%x, called by %p, stack size %d\n",
-			name, pc - func, (void *)ra, stacksize);
+			name, pc - func, (void *)(intptr_t)ra, stacksize);
 
 		if (ra == pc) {
 			(*pr)("-- loop? --\n");
@@ -237,7 +239,7 @@
 		}
 		sp += stacksize;
 		pc = ra;
-	} while (pc > (unsigned)verylocore);
+	} while (pc > (intptr_t)verylocore);
 	if (pc < 0x80000000)
 		(*pr)("-- user process --\n");
 	else

Index: src/sys/arch/mips/mips/trap.c
diff -u src/sys/arch/mips/mips/trap.c:1.217.12.3 src/sys/arch/mips/mips/trap.c:1.217.12.4
--- src/sys/arch/mips/mips/trap.c:1.217.12.3	Sun Aug 23 04:06:01 2009
+++ src/sys/arch/mips/mips/trap.c	Sun Aug 23 04:38:34 2009
@@ -1,4 +1,4 @@
-/*	$NetBSD: trap.c,v 1.217.12.3 2009/08/23 04:06:01 matt Exp $	*/
+/*	$NetBSD: trap.c,v 1.217.12.4 2009/08/23 04:38:34 uebayasi Exp $	*/
 
 /*
  * Copyright (c) 1992, 1993
@@ -78,7 +78,7 @@
 
 #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
 
-__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.217.12.3 2009/08/23 04:06:01 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.217.12.4 2009/08/23 04:38:34 uebayasi Exp $");
 
 #include "opt_cputype.h"	/* which mips CPU levels do we support? */
 #include "opt_ddb.h"
@@ -664,7 +664,7 @@
 #ifndef DDB_TRACE
 
 #if defined(DEBUG) || defined(DDB) || defined(KGDB) || defined(geo)
-mips_reg_t kdbrpeek(vaddr_t);
+mips_reg_t kdbrpeek(vaddr_t, size_t);
 
 int
 kdbpeek(vaddr_t addr)
@@ -686,11 +686,11 @@
 }
 
 mips_reg_t
-kdbrpeek(vaddr_t addr)
+kdbrpeek(vaddr_t addr, size_t n)
 {
 	mips_reg_t rc;
 
-	if (addr & (sizeof(mips_reg_t) - 1)) {
+	if (addr & (n - 1)) {
 		printf("kdbrpeek: unaligned address %#"PRIxVADDR"\n", addr);
 		/* We might have been called from DDB, so do not go there. */
 		stacktrace();
@@ -699,7 +699,10 @@
 		printf("kdbrpeek: NULL\n");
 		rc = 0xdeadfeed;
 	} else {
-		rc = *(mips_reg_t *)addr;
+		if (sizeof(mips_reg_t) == 8 && n == 8)
+			rc = *(int64_t *)addr;
+		else
+			rc = *(int32_t *)addr;
 	}
 	return rc;
 }
@@ -762,7 +765,7 @@
 	}
 
 	/* check for bad SP: could foul up next frame */
-	if (sp & 3 || sp < 0x80000000) {
+	if (sp & 3 || (intptr_t)sp >= 0) {
 		(*printfn)("SP 0x%x: not in kernel\n", sp);
 		ra = 0;
 		subr = 0;
@@ -770,7 +773,7 @@
 	}
 
 	/* Check for bad PC */
-	if (pc & 3 || pc < 0x80000000 || pc >= (unsigned)edata) {
+	if (pc & 3 || (intptr_t)pc >= 0 || (intptr_t)pc >= (intptr_t)edata) {
 		(*printfn)("PC 0x%x: not in kernel space\n", pc);
 		ra = 0;
 		goto done;
@@ -811,7 +814,7 @@
 	va = pc;
 	do {
 		va -= sizeof(int);
-		if (va <= (unsigned)verylocore)
+		if (va <= (vaddr_t)verylocore)
 			goto finish;
 		instr = kdbpeek(va);
 		if (instr == MIPS_ERET)
@@ -875,6 +878,12 @@
 			break;
 
 		case OP_SW:
+#if !defined(__mips_o32)
+		case OP_SD:
+#endif
+		{
+			size_t size = (i.JType.op == OP_SW) ? 4 : 8;
+
 			/* look for saved registers on the stack */
 			if (i.IType.rs != 29)
 				break;
@@ -884,32 +893,37 @@
 			mask |= (1 << i.IType.rt);
 			switch (i.IType.rt) {
 			case 4: /* a0 */
-				a0 = kdbpeek(sp + (short)i.IType.imm);
+				a0 = kdbrpeek(sp + (short)i.IType.imm, size);
 				break;
 
 			case 5: /* a1 */
-				a1 = kdbpeek(sp + (short)i.IType.imm);
+				a1 = kdbrpeek(sp + (short)i.IType.imm, size);
 				break;
 
 			case 6: /* a2 */
-				a2 = kdbpeek(sp + (short)i.IType.imm);
+				a2 = kdbrpeek(sp + (short)i.IType.imm, size);
 				break;
 
 			case 7: /* a3 */
-				a3 = kdbpeek(sp + (short)i.IType.imm);
+				a3 = kdbrpeek(sp + (short)i.IType.imm, size);
 				break;
 
 			case 30: /* fp */
-				fp = kdbpeek(sp + (short)i.IType.imm);
+				fp = kdbrpeek(sp + (short)i.IType.imm, size);
 				break;
 
 			case 31: /* ra */
-				ra = kdbpeek(sp + (short)i.IType.imm);
+				ra = kdbrpeek(sp + (short)i.IType.imm, size);
 			}
 			break;
+		}
 
 		case OP_ADDI:
 		case OP_ADDIU:
+#if !defined(__mips_o32)
+		case OP_DADDI:
+		case OP_DADDIU:
+#endif
 			/* look for stack pointer adjustment */
 			if (i.IType.rs != 29 || i.IType.rt != 29)
 				break;

Reply via email to