Module Name: src
Committed By: mrg
Date: Sat Dec 5 22:24:11 UTC 2009
Modified Files:
src/sys/arch/sparc64/include: pte.h
Log Message:
- update the TLB_SOFT2_MASK and TLB_DIAG_MASK definitions for USIII. partly
from openbsd.
- rename TLB_DIAG_MASK to TLB_RESERVED_MASK. from openbsd.
- fix the TLB_PA_MASK definition to be correct. our old one was 4 bits
too wide.
- fix various errors in the #if 0 bitfield version of struct sun4u_tag_fields.
tested on U60 and SB2500.
To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/sparc64/include/pte.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/sparc64/include/pte.h
diff -u src/sys/arch/sparc64/include/pte.h:1.20 src/sys/arch/sparc64/include/pte.h:1.21
--- src/sys/arch/sparc64/include/pte.h:1.20 Fri Mar 14 15:40:02 2008
+++ src/sys/arch/sparc64/include/pte.h Sat Dec 5 22:24:11 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: pte.h,v 1.20 2008/03/14 15:40:02 nakayama Exp $ */
+/* $NetBSD: pte.h,v 1.21 2009/12/05 22:24:11 mrg Exp $ */
/*
* Copyright (c) 1996-1999 Eduardo Horvath
@@ -41,15 +41,17 @@
*
* struct sun4u_tte {
* uint64 tag_g:1, (global flag)
- * tag_ctxt:15, (context for mapping)
+ * tag_reserved:2, (reserved for future use)
+ * tag_ctxt:13, (context for mapping)
* tag_unassigned:6,
* tag_va:42; (virtual address bits<64:22>)
* uint64 data_v:1, (valid bit)
* data_size:2, (page size [8K*8**<SIZE>])
* data_nfo:1, (no-fault only)
* data_ie:1, (invert endianness [inefficient])
- * data_soft2:2, (reserved for S/W)
- * data_pa:36, (physical address)
+ * data_soft9:9, (reserved for S/W)
+ * data_reserved:7,(reserved for future use)
+ * data_pa:30, (physical address)
* data_soft:6, (reserved for S/W)
* data_lock:1, (lock into TLB)
* data_cacheable:2, (cacheability control)
@@ -91,23 +93,25 @@
#if 0
/* We don't use bitfeilds anyway. */
struct sun4u_tag_fields {
- uint64_t tag_g:1, /* global flag */
- tag_ctxt:15, /* context for mapping */
+ uint64_t tag_g:1, /* global flag */
+ tag_reserved:2, /* reserved for future use */
+ tag_ctxt:13, /* context for mapping */
tag_unassigned:6,
tag_va:42; /* virtual address bits<64:22> */
};
union sun4u_tag { struct sun4u_tag_fields f; int64_t tag; };
struct sun4u_data_fields {
- uint64_t data_v:1, /* valid bit */
+ uint64_t data_v:1, /* valid bit */
data_size:2, /* page size [8K*8**<SIZE>] */
data_nfo:1, /* no-fault only */
data_ie:1, /* invert endianness [inefficient] */
- data_soft2:2, /* reserved for S/W */
- data_pa:36, /* physical address */
- data_accessed:1,/* S/W accessed bit */
+ data_soft2:9, /* reserved for S/W */
+ data_reserved:7,/* reserved for future use */
+ data_pa:30, /* physical address */
+ data_tsblock:1, /* S/W TSB locked entry */
data_modified:1,/* S/W modified bit */
data_realw:1, /* S/W real writable bit (to manage modified) */
- data_tsblock:1, /* S/W TSB locked entry */
+ data_accessed:1,/* S/W accessed bit */
data_exec:1, /* S/W Executable */
data_onlyexec:1,/* S/W Executable only */
data_lock:1, /* lock into TLB */
@@ -160,9 +164,9 @@
#define TLB_SZ_MASK 0x6000000000000000LL
#define TLB_NFO 0x1000000000000000LL
#define TLB_IE 0x0800000000000000LL
-#define TLB_SOFT2_MASK 0x07fe000000000000LL
-#define TLB_DIAG_MASK 0x0001fe0000000000LL
-#define TLB_PA_MASK 0x000001ffffffe000LL
+#define TLB_SOFT2_MASK 0x07fc000000000000LL
+#define TLB_RESERVED_MASK 0x0003f80000000000LL
+#define TLB_PA_MASK 0x000007ffffffe000LL
#define TLB_SOFT_MASK 0x0000000000001f80LL
/* S/W bits */
/* Access & TSB locked bits are swapped so I can set access w/one insn */
