Module Name: src
Committed By: jmcneill
Date: Sun Jan 20 17:27:30 UTC 2019
Modified Files:
src/sys/arch/arm/amlogic: meson_clk_div.c
Log Message:
Always honour MESON_CLK_DIV_SET_RATE_PARENT
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/amlogic/meson_clk_div.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/amlogic/meson_clk_div.c
diff -u src/sys/arch/arm/amlogic/meson_clk_div.c:1.1 src/sys/arch/arm/amlogic/meson_clk_div.c:1.2
--- src/sys/arch/arm/amlogic/meson_clk_div.c:1.1 Sat Jan 19 20:56:03 2019
+++ src/sys/arch/arm/amlogic/meson_clk_div.c Sun Jan 20 17:27:30 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: meson_clk_div.c,v 1.1 2019/01/19 20:56:03 jmcneill Exp $ */
+/* $NetBSD: meson_clk_div.c,v 1.2 2019/01/20 17:27:30 jmcneill Exp $ */
/*-
* Copyright (c) 2017-2019 Jared McNeill <[email protected]>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: meson_clk_div.c,v 1.1 2019/01/19 20:56:03 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: meson_clk_div.c,v 1.2 2019/01/20 17:27:30 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -90,12 +90,11 @@ meson_clk_div_set_rate(struct meson_clk_
if (clkp_parent == NULL)
return ENXIO;
- if (div->div == 0) {
- if ((div->flags & MESON_CLK_DIV_SET_RATE_PARENT) != 0)
- return clk_set_rate(clkp_parent, new_rate);
- else
- return ENXIO;
- }
+ if ((div->flags & MESON_CLK_DIV_SET_RATE_PARENT) != 0)
+ return clk_set_rate(clkp_parent, new_rate);
+
+ if (div->div == 0)
+ return ENXIO;
val = CLK_READ(sc, div->reg);
