Module Name:    src
Committed By:   msaitoh
Date:           Wed Feb 13 04:35:58 UTC 2019

Modified Files:
        src/sys/dev/mii: miidevs.h miidevs_data.h

Log Message:
 Regen.


To generate a diff of this commit:
cvs rdiff -u -r1.138 -r1.139 src/sys/dev/mii/miidevs.h
cvs rdiff -u -r1.126 -r1.127 src/sys/dev/mii/miidevs_data.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/mii/miidevs.h
diff -u src/sys/dev/mii/miidevs.h:1.138 src/sys/dev/mii/miidevs.h:1.139
--- src/sys/dev/mii/miidevs.h:1.138	Wed Feb 13 03:54:53 2019
+++ src/sys/dev/mii/miidevs.h	Wed Feb 13 04:35:58 2019
@@ -1,10 +1,10 @@
-/*	$NetBSD: miidevs.h,v 1.138 2019/02/13 03:54:53 msaitoh Exp $	*/
+/*	$NetBSD: miidevs.h,v 1.139 2019/02/13 04:35:58 msaitoh Exp $	*/
 
 /*
  * THIS FILE AUTOMATICALLY GENERATED.  DO NOT EDIT.
  *
  * generated from:
- *	NetBSD: miidevs,v 1.136 2019/02/13 03:54:16 msaitoh Exp
+ *	NetBSD: miidevs,v 1.139 2019/02/13 04:35:28 msaitoh Exp
  */
 
 /*-
@@ -161,10 +161,10 @@
 /* Don't know the model for ACXXX */
 #define	MII_MODEL_ALTIMA_ACXXX	0x0001
 #define	MII_STR_ALTIMA_ACXXX	"ACXXX 10/100 media interface"
-#define	MII_MODEL_ALTIMA_AC101	0x0021
-#define	MII_STR_ALTIMA_AC101	"AC101 10/100 media interface"
 #define	MII_MODEL_ALTIMA_AC101L	0x0012
 #define	MII_STR_ALTIMA_AC101L	"AC101L 10/100 media interface"
+#define	MII_MODEL_ALTIMA_AC101	0x0021
+#define	MII_STR_ALTIMA_AC101	"AC101 10/100 media interface"
 /* AMD Am79C87[45] have ALTIMA OUI */
 #define	MII_MODEL_ALTIMA_Am79C875	0x0014
 #define	MII_STR_ALTIMA_Am79C875	"Am79C875 10/100 media interface"
@@ -187,12 +187,12 @@
 #define	MII_STR_xxBROADCOM_3C905B	"Broadcom 3c905B internal PHY"
 #define	MII_MODEL_xxBROADCOM_3C905C	0x0017
 #define	MII_STR_xxBROADCOM_3C905C	"Broadcom 3c905C internal PHY"
+#define	MII_MODEL_xxBROADCOM_BCM5221	0x001e
+#define	MII_STR_xxBROADCOM_BCM5221	"BCM5221 10/100 media interface"
 #define	MII_MODEL_xxBROADCOM_BCM5201	0x0021
 #define	MII_STR_xxBROADCOM_BCM5201	"BCM5201 10/100 media interface"
 #define	MII_MODEL_xxBROADCOM_BCM5214	0x0028
 #define	MII_STR_xxBROADCOM_BCM5214	"BCM5214 Quad 10/100 media interface"
-#define	MII_MODEL_xxBROADCOM_BCM5221	0x001e
-#define	MII_STR_xxBROADCOM_BCM5221	"BCM5221 10/100 media interface"
 #define	MII_MODEL_xxBROADCOM_BCM5222	0x0032
 #define	MII_STR_xxBROADCOM_BCM5222	"BCM5222 Dual 10/100 media interface"
 #define	MII_MODEL_xxBROADCOM_BCM4401	0x0036
@@ -203,8 +203,14 @@
 #define	MII_STR_BROADCOM_BCM5400	"BCM5400 1000BASE-T media interface"
 #define	MII_MODEL_BROADCOM_BCM5401	0x0005
 #define	MII_STR_BROADCOM_BCM5401	"BCM5401 1000BASE-T media interface"
+#define	MII_MODEL_BROADCOM_BCM5402	0x0006
+#define	MII_STR_BROADCOM_BCM5402	"BCM5402 1000BASE-T media interface"
 #define	MII_MODEL_BROADCOM_BCM5411	0x0007
 #define	MII_STR_BROADCOM_BCM5411	"BCM5411 1000BASE-T media interface"
+#define	MII_MODEL_BROADCOM_BCM5404	0x0008
+#define	MII_STR_BROADCOM_BCM5404	"BCM5404 1000BASE-T media interface"
+#define	MII_MODEL_BROADCOM_BCM5424	0x000a
+#define	MII_STR_BROADCOM_BCM5424	"BCM5424/BCM5234 1000BASE-T media interface"
 #define	MII_MODEL_BROADCOM_BCM5464	0x000b
 #define	MII_STR_BROADCOM_BCM5464	"BCM5464 1000BASE-T media interface"
 #define	MII_MODEL_BROADCOM_BCM5461	0x000c
@@ -235,10 +241,16 @@
 #define	MII_STR_BROADCOM_BCM5780	"BCM5780 1000BASE-T/X media interface"
 #define	MII_MODEL_BROADCOM_BCM5708C	0x0036
 #define	MII_STR_BROADCOM_BCM5708C	"BCM5708C 1000BASE-T media interface"
+#define	MII_MODEL_BROADCOM_BCM5466	0x003b
+#define	MII_STR_BROADCOM_BCM5466	"BCM5466 1000BASE-T media interface"
 #define	MII_MODEL_BROADCOM2_BCM5325	0x0003
 #define	MII_STR_BROADCOM2_BCM5325	"BCM5325 10/100 5-port PHY switch"
 #define	MII_MODEL_BROADCOM2_BCM5906	0x0004
 #define	MII_STR_BROADCOM2_BCM5906	"BCM5906 10/100baseTX media interface"
+#define	MII_MODEL_BROADCOM2_BCM5478	0x0008
+#define	MII_STR_BROADCOM2_BCM5478	"BCM5478 1000BASE-T media interface"
+#define	MII_MODEL_BROADCOM2_BCM5488	0x0009
+#define	MII_STR_BROADCOM2_BCM5488	"BCM5488 1000BASE-T media interface"
 #define	MII_MODEL_BROADCOM2_BCM5481	0x000a
 #define	MII_STR_BROADCOM2_BCM5481	"BCM5481 1000BASE-T media interface"
 #define	MII_MODEL_BROADCOM2_BCM5482	0x000b
@@ -293,10 +305,10 @@
 #define	MII_STR_CICADA_CS8201B	"Cicada CS8201 10/100/1000TX PHY"
 #define	MII_MODEL_xxCICADA_VSC8221	0x0015
 #define	MII_STR_xxCICADA_VSC8221	"Vitesse VSC8221 10/100/1000BASE-T PHY"
-#define	MII_MODEL_xxCICADA_VSC8244	0x002c
-#define	MII_STR_xxCICADA_VSC8244	"Vitesse VSC8244 Quad 10/100/1000BASE-T PHY"
 #define	MII_MODEL_xxCICADA_CS8201B	0x0021
 #define	MII_STR_xxCICADA_CS8201B	"Cicada CS8201 10/100/1000TX PHY"
+#define	MII_MODEL_xxCICADA_VSC8244	0x002c
+#define	MII_STR_xxCICADA_VSC8244	"Vitesse VSC8244 Quad 10/100/1000BASE-T PHY"
 
 /* Davicom Semiconductor PHYs */
 /* AMD Am79C873 seems to be a relabeled DM9101 */
@@ -324,6 +336,8 @@
 #define	MII_STR_ICS_1892	"ICS1892 10/100 media interface"
 #define	MII_MODEL_ICS_1893	0x0004
 #define	MII_STR_ICS_1893	"ICS1893 10/100 media interface"
+#define	MII_MODEL_ICS_1893C	0x0005
+#define	MII_STR_ICS_1893C	"ICS1893C 10/100 media interface"
 
 /* Intel PHYs */
 #define	MII_MODEL_xxINTEL_I82553	0x0000
@@ -377,18 +391,18 @@
 /* Level 1 PHYs */
 #define	MII_MODEL_xxLEVEL1_LXT970	0x0000
 #define	MII_STR_xxLEVEL1_LXT970	"LXT970 10/100 media interface"
-#define	MII_MODEL_LEVEL1_LXT971	0x000e
-#define	MII_STR_LEVEL1_LXT971	"LXT971/2 10/100 media interface"
-#define	MII_MODEL_LEVEL1_LXT973	0x0021
-#define	MII_STR_LEVEL1_LXT973	"LXT973 10/100 Dual PHY"
+#define	MII_MODEL_LEVEL1_LXT1000_OLD	0x0003
+#define	MII_STR_LEVEL1_LXT1000_OLD	"LXT1000 1000BASE-T media interface"
 #define	MII_MODEL_LEVEL1_LXT974	0x0004
 #define	MII_STR_LEVEL1_LXT974	"LXT974 10/100 Quad PHY"
 #define	MII_MODEL_LEVEL1_LXT975	0x0005
 #define	MII_STR_LEVEL1_LXT975	"LXT975 10/100 Quad PHY"
-#define	MII_MODEL_LEVEL1_LXT1000_OLD	0x0003
-#define	MII_STR_LEVEL1_LXT1000_OLD	"LXT1000 1000BASE-T media interface"
 #define	MII_MODEL_LEVEL1_LXT1000	0x000c
 #define	MII_STR_LEVEL1_LXT1000	"LXT1000 1000BASE-T media interface"
+#define	MII_MODEL_LEVEL1_LXT971	0x000e
+#define	MII_STR_LEVEL1_LXT971	"LXT971/2 10/100 media interface"
+#define	MII_MODEL_LEVEL1_LXT973	0x0021
+#define	MII_STR_LEVEL1_LXT973	"LXT973 10/100 Dual PHY"
 
 /* Marvell Semiconductor PHYs */
 #define	MII_MODEL_xxMARVELL_E1000	0x0000
@@ -453,8 +467,12 @@
 #define	MII_STR_MARVELL_E1111	"Marvell 88E1111 Gigabit PHY"
 
 /* Micrel PHYs */
+#define	MII_MODEL_MICREL_KSZ8081	0x0016
+#define	MII_STR_MICREL_KSZ8081	"Micrel KSZ8081 10/100 PHY"
 #define	MII_MODEL_MICREL_KSZ9021RNI	0x0021
 #define	MII_STR_MICREL_KSZ9021RNI	"Micrel KSZ9021RNI 10/100/1000 PHY"
+#define	MII_MODEL_MICREL_KSZ9031	0x0022
+#define	MII_STR_MICREL_KSZ9031	"Micrel KSZ9031 10/100/1000 PHY"
 
 /* Myson Technology PHYs */
 #define	MII_MODEL_xxMYSON_MTD972	0x0000
@@ -497,11 +515,12 @@
 /* RDC Semiconductor PHYs */
 #define	MII_MODEL_RDC_R6040	0x0003
 #define	MII_STR_RDC_R6040	"R6040 10/100 media interface"
+
 /* RealTek PHYs */
-#define	MII_MODEL_yyREALTEK_RTL8201L	0x0020
-#define	MII_STR_yyREALTEK_RTL8201L	"RTL8201L 10/100 media interface"
 #define	MII_MODEL_xxREALTEK_RTL8169S	0x0011
 #define	MII_STR_xxREALTEK_RTL8169S	"RTL8169S/8110S/8211 1000BASE-T media interface"
+#define	MII_MODEL_yyREALTEK_RTL8201L	0x0020
+#define	MII_STR_yyREALTEK_RTL8201L	"RTL8201L 10/100 media interface"
 #define	MII_MODEL_REALTEK_RTL8251	0x0000
 #define	MII_STR_REALTEK_RTL8251	"RTL8251 1000BASE-T media interface"
 #define	MII_MODEL_REALTEK_RTL8201E	0x0008

Index: src/sys/dev/mii/miidevs_data.h
diff -u src/sys/dev/mii/miidevs_data.h:1.126 src/sys/dev/mii/miidevs_data.h:1.127
--- src/sys/dev/mii/miidevs_data.h:1.126	Wed Feb 13 03:54:53 2019
+++ src/sys/dev/mii/miidevs_data.h	Wed Feb 13 04:35:58 2019
@@ -1,10 +1,10 @@
-/*	$NetBSD: miidevs_data.h,v 1.126 2019/02/13 03:54:53 msaitoh Exp $	*/
+/*	$NetBSD: miidevs_data.h,v 1.127 2019/02/13 04:35:58 msaitoh Exp $	*/
 
 /*
  * THIS FILE AUTOMATICALLY GENERATED.  DO NOT EDIT.
  *
  * generated from:
- *	NetBSD: miidevs,v 1.136 2019/02/13 03:54:16 msaitoh Exp
+ *	NetBSD: miidevs,v 1.139 2019/02/13 04:35:28 msaitoh Exp
  */
 
 /*-
@@ -46,8 +46,8 @@ struct mii_knowndev mii_knowndevs[] = {
  { MII_OUI_ATTANSIC, MII_MODEL_ATTANSIC_AR8021, MII_STR_ATTANSIC_AR8021 },
  { MII_OUI_ATTANSIC, MII_MODEL_ATTANSIC_AR8035, MII_STR_ATTANSIC_AR8035 },
  { MII_OUI_ALTIMA, MII_MODEL_ALTIMA_ACXXX, MII_STR_ALTIMA_ACXXX },
- { MII_OUI_ALTIMA, MII_MODEL_ALTIMA_AC101, MII_STR_ALTIMA_AC101 },
  { MII_OUI_ALTIMA, MII_MODEL_ALTIMA_AC101L, MII_STR_ALTIMA_AC101L },
+ { MII_OUI_ALTIMA, MII_MODEL_ALTIMA_AC101, MII_STR_ALTIMA_AC101 },
  { MII_OUI_ALTIMA, MII_MODEL_ALTIMA_Am79C875, MII_STR_ALTIMA_Am79C875 },
  { MII_OUI_ALTIMA, MII_MODEL_ALTIMA_Am79C874, MII_STR_ALTIMA_Am79C874 },
  { MII_OUI_yyAMD, MII_MODEL_yyAMD_79C972_10T, MII_STR_yyAMD_79C972_10T },
@@ -56,15 +56,18 @@ struct mii_knowndev mii_knowndevs[] = {
  { MII_OUI_yyAMD, MII_MODEL_yyAMD_79c901home, MII_STR_yyAMD_79c901home },
  { MII_OUI_xxBROADCOM, MII_MODEL_xxBROADCOM_3C905B, MII_STR_xxBROADCOM_3C905B },
  { MII_OUI_xxBROADCOM, MII_MODEL_xxBROADCOM_3C905C, MII_STR_xxBROADCOM_3C905C },
+ { MII_OUI_xxBROADCOM, MII_MODEL_xxBROADCOM_BCM5221, MII_STR_xxBROADCOM_BCM5221 },
  { MII_OUI_xxBROADCOM, MII_MODEL_xxBROADCOM_BCM5201, MII_STR_xxBROADCOM_BCM5201 },
  { MII_OUI_xxBROADCOM, MII_MODEL_xxBROADCOM_BCM5214, MII_STR_xxBROADCOM_BCM5214 },
- { MII_OUI_xxBROADCOM, MII_MODEL_xxBROADCOM_BCM5221, MII_STR_xxBROADCOM_BCM5221 },
  { MII_OUI_xxBROADCOM, MII_MODEL_xxBROADCOM_BCM5222, MII_STR_xxBROADCOM_BCM5222 },
  { MII_OUI_xxBROADCOM, MII_MODEL_xxBROADCOM_BCM4401, MII_STR_xxBROADCOM_BCM4401 },
  { MII_OUI_xxBROADCOM, MII_MODEL_xxBROADCOM_BCM5365, MII_STR_xxBROADCOM_BCM5365 },
  { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5400, MII_STR_BROADCOM_BCM5400 },
  { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5401, MII_STR_BROADCOM_BCM5401 },
+ { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5402, MII_STR_BROADCOM_BCM5402 },
  { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5411, MII_STR_BROADCOM_BCM5411 },
+ { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5404, MII_STR_BROADCOM_BCM5404 },
+ { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5424, MII_STR_BROADCOM_BCM5424 },
  { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5464, MII_STR_BROADCOM_BCM5464 },
  { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5461, MII_STR_BROADCOM_BCM5461 },
  { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5462, MII_STR_BROADCOM_BCM5462 },
@@ -80,8 +83,11 @@ struct mii_knowndev mii_knowndevs[] = {
  { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5714, MII_STR_BROADCOM_BCM5714 },
  { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5780, MII_STR_BROADCOM_BCM5780 },
  { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5708C, MII_STR_BROADCOM_BCM5708C },
+ { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5466, MII_STR_BROADCOM_BCM5466 },
  { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5325, MII_STR_BROADCOM2_BCM5325 },
  { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5906, MII_STR_BROADCOM2_BCM5906 },
+ { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5478, MII_STR_BROADCOM2_BCM5478 },
+ { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5488, MII_STR_BROADCOM2_BCM5488 },
  { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5481, MII_STR_BROADCOM2_BCM5481 },
  { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5482, MII_STR_BROADCOM2_BCM5482 },
  { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5755, MII_STR_BROADCOM2_BCM5755 },
@@ -108,8 +114,8 @@ struct mii_knowndev mii_knowndevs[] = {
  { MII_OUI_CICADA, MII_MODEL_CICADA_CS8201A, MII_STR_CICADA_CS8201A },
  { MII_OUI_CICADA, MII_MODEL_CICADA_CS8201B, MII_STR_CICADA_CS8201B },
  { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_VSC8221, MII_STR_xxCICADA_VSC8221 },
- { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_VSC8244, MII_STR_xxCICADA_VSC8244 },
  { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_CS8201B, MII_STR_xxCICADA_CS8201B },
+ { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_VSC8244, MII_STR_xxCICADA_VSC8244 },
  { MII_OUI_xxDAVICOM, MII_MODEL_xxDAVICOM_DM9101, MII_STR_xxDAVICOM_DM9101 },
  { MII_OUI_xxDAVICOM, MII_MODEL_xxDAVICOM_DM9102, MII_STR_xxDAVICOM_DM9102 },
  { MII_OUI_ICPLUS, MII_MODEL_ICPLUS_IP100, MII_STR_ICPLUS_IP100 },
@@ -120,6 +126,7 @@ struct mii_knowndev mii_knowndevs[] = {
  { MII_OUI_ICS, MII_MODEL_ICS_1890, MII_STR_ICS_1890 },
  { MII_OUI_ICS, MII_MODEL_ICS_1892, MII_STR_ICS_1892 },
  { MII_OUI_ICS, MII_MODEL_ICS_1893, MII_STR_ICS_1893 },
+ { MII_OUI_ICS, MII_MODEL_ICS_1893C, MII_STR_ICS_1893C },
  { MII_OUI_xxINTEL, MII_MODEL_xxINTEL_I82553, MII_STR_xxINTEL_I82553 },
  { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82555, MII_STR_yyINTEL_I82555 },
  { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82562EH, MII_STR_yyINTEL_I82562EH },
@@ -143,12 +150,12 @@ struct mii_knowndev mii_knowndevs[] = {
  { MII_OUI_JMICRON, MII_MODEL_JMICRON_JMC250, MII_STR_JMICRON_JMC250 },
  { MII_OUI_JMICRON, MII_MODEL_JMICRON_JMC260, MII_STR_JMICRON_JMC260 },
  { MII_OUI_xxLEVEL1, MII_MODEL_xxLEVEL1_LXT970, MII_STR_xxLEVEL1_LXT970 },
- { MII_OUI_LEVEL1, MII_MODEL_LEVEL1_LXT971, MII_STR_LEVEL1_LXT971 },
- { MII_OUI_LEVEL1, MII_MODEL_LEVEL1_LXT973, MII_STR_LEVEL1_LXT973 },
+ { MII_OUI_LEVEL1, MII_MODEL_LEVEL1_LXT1000_OLD, MII_STR_LEVEL1_LXT1000_OLD },
  { MII_OUI_LEVEL1, MII_MODEL_LEVEL1_LXT974, MII_STR_LEVEL1_LXT974 },
  { MII_OUI_LEVEL1, MII_MODEL_LEVEL1_LXT975, MII_STR_LEVEL1_LXT975 },
- { MII_OUI_LEVEL1, MII_MODEL_LEVEL1_LXT1000_OLD, MII_STR_LEVEL1_LXT1000_OLD },
  { MII_OUI_LEVEL1, MII_MODEL_LEVEL1_LXT1000, MII_STR_LEVEL1_LXT1000 },
+ { MII_OUI_LEVEL1, MII_MODEL_LEVEL1_LXT971, MII_STR_LEVEL1_LXT971 },
+ { MII_OUI_LEVEL1, MII_MODEL_LEVEL1_LXT973, MII_STR_LEVEL1_LXT973 },
  { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1000, MII_STR_xxMARVELL_E1000 },
  { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1011, MII_STR_xxMARVELL_E1011 },
  { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1000_3, MII_STR_xxMARVELL_E1000_3 },
@@ -179,7 +186,9 @@ struct mii_knowndev mii_knowndevs[] = {
  { MII_OUI_MARVELL, MII_MODEL_MARVELL_E1000_5, MII_STR_MARVELL_E1000_5 },
  { MII_OUI_MARVELL, MII_MODEL_MARVELL_E1000_6, MII_STR_MARVELL_E1000_6 },
  { MII_OUI_MARVELL, MII_MODEL_MARVELL_E1111, MII_STR_MARVELL_E1111 },
+ { MII_OUI_MICREL, MII_MODEL_MICREL_KSZ8081, MII_STR_MICREL_KSZ8081 },
  { MII_OUI_MICREL, MII_MODEL_MICREL_KSZ9021RNI, MII_STR_MICREL_KSZ9021RNI },
+ { MII_OUI_MICREL, MII_MODEL_MICREL_KSZ9031, MII_STR_MICREL_KSZ9031 },
  { MII_OUI_xxMYSON, MII_MODEL_xxMYSON_MTD972, MII_STR_xxMYSON_MTD972 },
  { MII_OUI_MYSON, MII_MODEL_MYSON_MTD803, MII_STR_MYSON_MTD803 },
  { MII_OUI_xxNATSEMI, MII_MODEL_xxNATSEMI_DP83840, MII_STR_xxNATSEMI_DP83840 },
@@ -196,8 +205,8 @@ struct mii_knowndev mii_knowndevs[] = {
  { MII_OUI_PMCSIERRA, MII_MODEL_PMCSIERRA_PM8354, MII_STR_PMCSIERRA_PM8354 },
  { MII_OUI_xxQUALSEMI, MII_MODEL_xxQUALSEMI_QS6612, MII_STR_xxQUALSEMI_QS6612 },
  { MII_OUI_RDC, MII_MODEL_RDC_R6040, MII_STR_RDC_R6040 },
- { MII_OUI_yyREALTEK, MII_MODEL_yyREALTEK_RTL8201L, MII_STR_yyREALTEK_RTL8201L },
  { MII_OUI_xxREALTEK, MII_MODEL_xxREALTEK_RTL8169S, MII_STR_xxREALTEK_RTL8169S },
+ { MII_OUI_yyREALTEK, MII_MODEL_yyREALTEK_RTL8201L, MII_STR_yyREALTEK_RTL8201L },
  { MII_OUI_REALTEK, MII_MODEL_REALTEK_RTL8251, MII_STR_REALTEK_RTL8251 },
  { MII_OUI_REALTEK, MII_MODEL_REALTEK_RTL8201E, MII_STR_REALTEK_RTL8201E },
  { MII_OUI_REALTEK, MII_MODEL_REALTEK_RTL8169S, MII_STR_REALTEK_RTL8169S },

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