Module Name: src
Committed By: msaitoh
Date: Wed Feb 13 08:40:14 UTC 2019
Modified Files:
src/sys/dev/mii: miidevs.h miidevs_data.h
Log Message:
regen.
To generate a diff of this commit:
cvs rdiff -u -r1.139 -r1.140 src/sys/dev/mii/miidevs.h
cvs rdiff -u -r1.127 -r1.128 src/sys/dev/mii/miidevs_data.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/mii/miidevs.h
diff -u src/sys/dev/mii/miidevs.h:1.139 src/sys/dev/mii/miidevs.h:1.140
--- src/sys/dev/mii/miidevs.h:1.139 Wed Feb 13 04:35:58 2019
+++ src/sys/dev/mii/miidevs.h Wed Feb 13 08:40:14 2019
@@ -1,10 +1,10 @@
-/* $NetBSD: miidevs.h,v 1.139 2019/02/13 04:35:58 msaitoh Exp $ */
+/* $NetBSD: miidevs.h,v 1.140 2019/02/13 08:40:14 msaitoh Exp $ */
/*
* THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
*
* generated from:
- * NetBSD: miidevs,v 1.139 2019/02/13 04:35:28 msaitoh Exp
+ * NetBSD: miidevs,v 1.140 2019/02/13 08:39:55 msaitoh Exp
*/
/*-
@@ -303,12 +303,12 @@
#define MII_STR_CICADA_CS8201A "Cicada CS8201 10/100/1000TX PHY"
#define MII_MODEL_CICADA_CS8201B 0x0021
#define MII_STR_CICADA_CS8201B "Cicada CS8201 10/100/1000TX PHY"
+#define MII_MODEL_CICADA_CS8244 0x002c
+#define MII_STR_CICADA_CS8244 "Vitesse VSC8244 Quad 10/100/1000BASE-T PHY"
#define MII_MODEL_xxCICADA_VSC8221 0x0015
#define MII_STR_xxCICADA_VSC8221 "Vitesse VSC8221 10/100/1000BASE-T PHY"
#define MII_MODEL_xxCICADA_CS8201B 0x0021
#define MII_STR_xxCICADA_CS8201B "Cicada CS8201 10/100/1000TX PHY"
-#define MII_MODEL_xxCICADA_VSC8244 0x002c
-#define MII_STR_xxCICADA_VSC8244 "Vitesse VSC8244 Quad 10/100/1000BASE-T PHY"
/* Davicom Semiconductor PHYs */
/* AMD Am79C873 seems to be a relabeled DM9101 */
Index: src/sys/dev/mii/miidevs_data.h
diff -u src/sys/dev/mii/miidevs_data.h:1.127 src/sys/dev/mii/miidevs_data.h:1.128
--- src/sys/dev/mii/miidevs_data.h:1.127 Wed Feb 13 04:35:58 2019
+++ src/sys/dev/mii/miidevs_data.h Wed Feb 13 08:40:14 2019
@@ -1,10 +1,10 @@
-/* $NetBSD: miidevs_data.h,v 1.127 2019/02/13 04:35:58 msaitoh Exp $ */
+/* $NetBSD: miidevs_data.h,v 1.128 2019/02/13 08:40:14 msaitoh Exp $ */
/*
* THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
*
* generated from:
- * NetBSD: miidevs,v 1.139 2019/02/13 04:35:28 msaitoh Exp
+ * NetBSD: miidevs,v 1.140 2019/02/13 08:39:55 msaitoh Exp
*/
/*-
@@ -113,9 +113,9 @@ struct mii_knowndev mii_knowndevs[] = {
{ MII_OUI_CICADA, MII_MODEL_CICADA_VSC8211, MII_STR_CICADA_VSC8211 },
{ MII_OUI_CICADA, MII_MODEL_CICADA_CS8201A, MII_STR_CICADA_CS8201A },
{ MII_OUI_CICADA, MII_MODEL_CICADA_CS8201B, MII_STR_CICADA_CS8201B },
+ { MII_OUI_CICADA, MII_MODEL_CICADA_CS8244, MII_STR_CICADA_CS8244 },
{ MII_OUI_xxCICADA, MII_MODEL_xxCICADA_VSC8221, MII_STR_xxCICADA_VSC8221 },
{ MII_OUI_xxCICADA, MII_MODEL_xxCICADA_CS8201B, MII_STR_xxCICADA_CS8201B },
- { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_VSC8244, MII_STR_xxCICADA_VSC8244 },
{ MII_OUI_xxDAVICOM, MII_MODEL_xxDAVICOM_DM9101, MII_STR_xxDAVICOM_DM9101 },
{ MII_OUI_xxDAVICOM, MII_MODEL_xxDAVICOM_DM9102, MII_STR_xxDAVICOM_DM9102 },
{ MII_OUI_ICPLUS, MII_MODEL_ICPLUS_IP100, MII_STR_ICPLUS_IP100 },
