Module Name: src
Committed By: ryo
Date: Mon Aug 3 06:30:00 UTC 2020
Modified Files:
src/sys/arch/aarch64/aarch64: TODO copyinout.S genassym.cf
src/sys/arch/aarch64/include: cpufunc.h types.h
Log Message:
Implement MD ucas(9) (__HAVE_UCAS_FULL)
To generate a diff of this commit:
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/aarch64/aarch64/TODO
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/aarch64/aarch64/copyinout.S
cvs rdiff -u -r1.27 -r1.28 src/sys/arch/aarch64/aarch64/genassym.cf
cvs rdiff -u -r1.17 -r1.18 src/sys/arch/aarch64/include/cpufunc.h
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/aarch64/include/types.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/TODO
diff -u src/sys/arch/aarch64/aarch64/TODO:1.8 src/sys/arch/aarch64/aarch64/TODO:1.9
--- src/sys/arch/aarch64/aarch64/TODO:1.8 Wed Dec 4 13:47:03 2019
+++ src/sys/arch/aarch64/aarch64/TODO Mon Aug 3 06:29:59 2020
@@ -1,7 +1,6 @@
-$NetBSD: TODO,v 1.8 2019/12/04 13:47:03 jmcneill Exp $
+$NetBSD: TODO,v 1.9 2020/08/03 06:29:59 ryo Exp $
TODO list for NetBSD/aarch64
- kernel preemption
- - Implement __HAVE_UCAS_FULL or __HAVE_UCAS_MP (don't use full generic impl)
- pmap should be work even if PID_MAX >= 65536 (don't depend 16bit ASID)
- TLB ASID in pmap should be randomized
Index: src/sys/arch/aarch64/aarch64/copyinout.S
diff -u src/sys/arch/aarch64/aarch64/copyinout.S:1.12 src/sys/arch/aarch64/aarch64/copyinout.S:1.13
--- src/sys/arch/aarch64/aarch64/copyinout.S:1.12 Mon Aug 3 05:56:49 2020
+++ src/sys/arch/aarch64/aarch64/copyinout.S Mon Aug 3 06:29:59 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: copyinout.S,v 1.12 2020/08/03 05:56:49 ryo Exp $ */
+/* $NetBSD: copyinout.S,v 1.13 2020/08/03 06:29:59 ryo Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -33,7 +33,7 @@
#include <aarch64/asm.h>
#include "assym.h"
-RCSID("$NetBSD: copyinout.S,v 1.12 2020/08/03 05:56:49 ryo Exp $");
+RCSID("$NetBSD: copyinout.S,v 1.13 2020/08/03 06:29:59 ryo Exp $");
#ifdef ARMV81_PAN
#define PAN_ENABLE \
@@ -348,3 +348,50 @@ ENTRY(kcopy)
exit_cpu_onfault
ret
END(kcopy)
+
+
+/* LINTSTUB: int _ucas_32(volatile uint32_t *uptr, uint32_t old, uint32_t new, uint32_t *retp); */
+ENTRY(_ucas_32)
+ tbnz x0, AARCH64_ADDRTOP_TAG_BIT, 3f /* not userspace */
+ ands x8, x0, #3
+ cbnz x8, 3f /* not aligned */
+
+ enter_cpu_onfault
+
+1: ldxr w4, [x0] /* load old value */
+ cmp w4, w1 /* compare? */
+ b.ne 2f /* return if different */
+ stxr w5, w2, [x0] /* store new value */
+ cbnz w5, 1b /* succeed? nope, try again. */
+2: str w4, [x3]
+ mov x8, #0 /* error = 0 */
+
+ exit_cpu_onfault
+ ret
+3:
+ mov x0, #EFAULT
+ ret
+END(_ucas_32)
+
+/* LINTSTUB: int _ucas_64(volatile uint64_t *uptr, uint64_t old, uint64_t new, uint64_t *retp); */
+ENTRY(_ucas_64)
+ tbnz x0, AARCH64_ADDRTOP_TAG_BIT, 3f /* not userspace */
+ ands x8, x0, #7
+ cbnz x8, 3f /* not aligned */
+
+ enter_cpu_onfault
+
+1: ldxr x4, [x0] /* load old value */
+ cmp x4, x1 /* compare? */
+ b.ne 2f /* return if different */
+ stxr w5, x2, [x0] /* store new value */
+ cbnz w5, 1b /* succeed? nope, try again. */
+2: str x4, [x3]
+ mov x8, #0 /* error = 0 */
+
+ exit_cpu_onfault
+ ret
+3:
+ mov x0, #EFAULT
+ ret
+END(_ucas_64)
Index: src/sys/arch/aarch64/aarch64/genassym.cf
diff -u src/sys/arch/aarch64/aarch64/genassym.cf:1.27 src/sys/arch/aarch64/aarch64/genassym.cf:1.28
--- src/sys/arch/aarch64/aarch64/genassym.cf:1.27 Mon Aug 3 05:56:50 2020
+++ src/sys/arch/aarch64/aarch64/genassym.cf Mon Aug 3 06:29:59 2020
@@ -1,4 +1,4 @@
-# $NetBSD: genassym.cf,v 1.27 2020/08/03 05:56:50 ryo Exp $
+# $NetBSD: genassym.cf,v 1.28 2020/08/03 06:29:59 ryo Exp $
#-
# Copyright (c) 2014 The NetBSD Foundation, Inc.
# All rights reserved.
@@ -56,6 +56,7 @@ include <arm/bus_defs.h>
include <aarch64/vmparam.h>
include <aarch64/frame.h>
include <aarch64/armreg.h>
+include <aarch64/cpufunc.h>
include <aarch64/pte.h>
define __HAVE_FAST_SOFTINTS 1
@@ -76,6 +77,8 @@ define USPACE (UPAGES * PAGE_SIZE)
#define PV_PA offsetof(pv_addr_t, pv_pa)
+define AARCH64_ADDRTOP_TAG_BIT AARCH64_ADDRTOP_TAG_BIT
+
define L0_ADDR_BITS L0_ADDR_BITS
define L0_SHIFT L0_SHIFT
define L0_TABLE L0_TABLE
Index: src/sys/arch/aarch64/include/cpufunc.h
diff -u src/sys/arch/aarch64/include/cpufunc.h:1.17 src/sys/arch/aarch64/include/cpufunc.h:1.18
--- src/sys/arch/aarch64/include/cpufunc.h:1.17 Sun Aug 2 06:58:16 2020
+++ src/sys/arch/aarch64/include/cpufunc.h Mon Aug 3 06:30:00 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: cpufunc.h,v 1.17 2020/08/02 06:58:16 maxv Exp $ */
+/* $NetBSD: cpufunc.h,v 1.18 2020/08/03 06:30:00 ryo Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu <r...@nerv.org>
@@ -167,6 +167,7 @@ cpu_earlydevice_va_p(void)
#endif /* _KERNEL */
/* definitions of TAG and PAC in pointers */
+#define AARCH64_ADDRTOP_TAG_BIT 55
#define AARCH64_ADDRTOP_TAG __BIT(55) /* ECR_EL1.TBI[01]=1 */
#define AARCH64_ADDRTOP_MSB __BIT(63) /* ECR_EL1.TBI[01]=0 */
#define AARCH64_ADDRESS_TAG_MASK __BITS(63,56) /* if TCR.TBI[01]=1 */
Index: src/sys/arch/aarch64/include/types.h
diff -u src/sys/arch/aarch64/include/types.h:1.14 src/sys/arch/aarch64/include/types.h:1.15
--- src/sys/arch/aarch64/include/types.h:1.14 Fri Feb 14 07:21:02 2020
+++ src/sys/arch/aarch64/include/types.h Mon Aug 3 06:30:00 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: types.h,v 1.14 2020/02/14 07:21:02 skrll Exp $ */
+/* $NetBSD: types.h,v 1.15 2020/08/03 06:30:00 ryo Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -105,6 +105,7 @@ typedef __uint64_t __register_t;
#define __HAVE_SYSCALL_INTERN
#define __HAVE_TLS_VARIANT_I
#define __HAVE___LWP_GETPRIVATE_FAST
+#define __HAVE_UCAS_FULL
#if defined(_KERNEL) || defined(_KMEMUSER)
#define PCU_FPU 0
