Module Name: src
Committed By: jmcneill
Date: Sun Feb 21 15:00:05 UTC 2021
Modified Files:
src/sys/arch/aarch64/include: cpu.h
src/sys/arch/arm/cortex: gicv3.c
src/sys/arch/arm/include: cpu.h
Log Message:
Keep current hardware priority value in struct cpu_info and use it instead
of reading icc_pmr_el1 in gicv3_set_priority.
To generate a diff of this commit:
cvs rdiff -u -r1.31 -r1.32 src/sys/arch/aarch64/include/cpu.h
cvs rdiff -u -r1.41 -r1.42 src/sys/arch/arm/cortex/gicv3.c
cvs rdiff -u -r1.115 -r1.116 src/sys/arch/arm/include/cpu.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/include/cpu.h
diff -u src/sys/arch/aarch64/include/cpu.h:1.31 src/sys/arch/aarch64/include/cpu.h:1.32
--- src/sys/arch/aarch64/include/cpu.h:1.31 Sat Feb 20 14:51:07 2021
+++ src/sys/arch/aarch64/include/cpu.h Sun Feb 21 15:00:04 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.31 2021/02/20 14:51:07 jmcneill Exp $ */
+/* $NetBSD: cpu.h,v 1.32 2021/02/21 15:00:04 jmcneill Exp $ */
/*-
* Copyright (c) 2014, 2020 The NetBSD Foundation, Inc.
@@ -100,7 +100,8 @@ struct cpu_info {
int ci_mtx_oldspl;
int ci_mtx_count;
- int ci_cpl;
+ int ci_cpl; /* current processor level (spl) */
+ int ci_hwpl; /* current hardware priority */
volatile u_int ci_softints;
volatile u_int ci_intr_depth;
volatile uint32_t ci_blocked_pics;
Index: src/sys/arch/arm/cortex/gicv3.c
diff -u src/sys/arch/arm/cortex/gicv3.c:1.41 src/sys/arch/arm/cortex/gicv3.c:1.42
--- src/sys/arch/arm/cortex/gicv3.c:1.41 Tue Feb 9 17:44:01 2021
+++ src/sys/arch/arm/cortex/gicv3.c Sun Feb 21 15:00:05 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: gicv3.c,v 1.41 2021/02/09 17:44:01 ryo Exp $ */
+/* $NetBSD: gicv3.c,v 1.42 2021/02/21 15:00:05 jmcneill Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill <jmcne...@invisible.ca>
@@ -31,7 +31,7 @@
#define _INTR_PRIVATE
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.41 2021/02/09 17:44:01 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.42 2021/02/21 15:00:05 jmcneill Exp $");
#include <sys/param.h>
#include <sys/kernel.h>
@@ -222,11 +222,12 @@ static void
gicv3_set_priority(struct pic_softc *pic, int ipl)
{
struct gicv3_softc * const sc = PICTOSOFTC(pic);
- const uint8_t curpmr = icc_pmr_read();
+ struct cpu_info * const ci = curcpu();
const uint8_t newpmr = IPL_TO_PMR(sc, ipl);
- if (newpmr > curpmr) {
+ if (newpmr > ci->ci_hwpl) {
/* Lowering priority mask */
+ ci->ci_hwpl = newpmr;
icc_pmr_write(newpmr);
}
}
@@ -414,7 +415,8 @@ gicv3_cpu_init(struct pic_softc *pic, st
;
/* Set initial priority mask */
- icc_pmr_write(IPL_TO_PMR(sc, IPL_HIGH));
+ ci->ci_hwpl = IPL_TO_PMR(sc, IPL_HIGH);
+ icc_pmr_write(ci->ci_hwpl);
/* Set the binary point field to the minimum value */
icc_bpr1_write(0);
@@ -733,7 +735,8 @@ gicv3_irq_handler(void *frame)
ci->ci_data.cpu_nintr++;
- if (icc_pmr_read() != pmr) {
+ if (ci->ci_hwpl != pmr) {
+ ci->ci_hwpl = pmr;
icc_pmr_write(pmr);
}
@@ -758,7 +761,7 @@ gicv3_irq_handler(void *frame)
pic_do_pending_ints(I32_bit, ipl, frame);
} else if (ci->ci_cpl != ipl) {
icc_pmr_write(IPL_TO_PMR(sc, ipl));
- ci->ci_cpl = ipl;
+ ci->ci_hwpl = ci->ci_cpl = ipl;
}
if (early_eoi) {
Index: src/sys/arch/arm/include/cpu.h
diff -u src/sys/arch/arm/include/cpu.h:1.115 src/sys/arch/arm/include/cpu.h:1.116
--- src/sys/arch/arm/include/cpu.h:1.115 Sat Feb 20 14:51:06 2021
+++ src/sys/arch/arm/include/cpu.h Sun Feb 21 15:00:04 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.115 2021/02/20 14:51:06 jmcneill Exp $ */
+/* $NetBSD: cpu.h,v 1.116 2021/02/21 15:00:04 jmcneill Exp $ */
/*
* Copyright (c) 1994-1996 Mark Brinicombe.
@@ -185,6 +185,7 @@ struct cpu_info {
ci_softc; /* platform softc */
int ci_cpl; /* current processor level (spl) */
+ int ci_hwpl; /* current hardware priority */
int ci_kfpu_spl;
volatile u_int ci_intr_depth; /* */
