Module Name: src
Committed By: matt
Date: Sun Feb 20 07:56:16 UTC 2011
Modified Files:
src/sys/arch/mipsco/include: intr.h sysconf.h
src/sys/arch/mipsco/mipsco: autoconf.c bus_dma.c cpu.c interrupt.c
machdep.c mainbus.c mips_3x30.c
Log Message:
Merge forward matt-nb5-mips64
Adapt to new interrupt/spl framework
To generate a diff of this commit:
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/mipsco/include/intr.h
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/mipsco/include/sysconf.h
cvs rdiff -u -r1.23 -r1.24 src/sys/arch/mipsco/mipsco/autoconf.c
cvs rdiff -u -r1.25 -r1.26 src/sys/arch/mipsco/mipsco/bus_dma.c
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/mipsco/mipsco/cpu.c \
src/sys/arch/mipsco/mipsco/mainbus.c
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/mipsco/mipsco/interrupt.c
cvs rdiff -u -r1.73 -r1.74 src/sys/arch/mipsco/mipsco/machdep.c
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/mipsco/mipsco/mips_3x30.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mipsco/include/intr.h
diff -u src/sys/arch/mipsco/include/intr.h:1.18 src/sys/arch/mipsco/include/intr.h:1.19
--- src/sys/arch/mipsco/include/intr.h:1.18 Mon Apr 13 09:37:50 2009
+++ src/sys/arch/mipsco/include/intr.h Sun Feb 20 07:56:16 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: intr.h,v 1.18 2009/04/13 09:37:50 he Exp $ */
+/* $NetBSD: intr.h,v 1.19 2011/02/20 07:56:16 matt Exp $ */
/*
* Copyright (c) 1998 Jonathan Stone. All rights reserved.
@@ -33,42 +33,12 @@
#ifndef _MACHINE_INTR_H_
#define _MACHINE_INTR_H_
-#define IPL_NONE 0 /* disable only this interrupt */
-#define IPL_SOFTCLOCK 1 /* generic software interrupts */
-#define IPL_SOFTBIO 1 /* clock software interrupts */
-#define IPL_SOFTNET 2 /* network software interrupts */
-#define IPL_SOFTSERIAL 2 /* serial software interrupts */
-#define IPL_VM 3
-#define IPL_SCHED 4
-#define IPL_HIGH 4 /* disable all interrupts */
-
-#define IPL_N 5
-
-/* Interrupt sharing types. */
-#define IST_NONE 0 /* none */
-#define IST_PULSE 1 /* pulsed */
-#define IST_EDGE 2 /* edge-triggered */
-#define IST_LEVEL 3 /* level-triggered */
+#include <mips/intr.h>
#ifdef _KERNEL
-#ifndef _LOCORE
-#include <sys/types.h>
+#ifdef __INTR_PRIVATE
#include <sys/evcnt.h>
-#include <sys/queue.h>
-#include <mips/locore.h>
-
-/*
- * software simulated interrupt
- */
-#define setsoft(x) do { \
- extern u_int ssir; \
- int _s; \
- \
- _s = splhigh(); \
- ssir |= 1 << (x); \
- _setsoftintr(MIPS_SOFT_INT_MASK_1); \
- splx(_s); \
-} while (0)
+#include <mips/cpuregs.h>
/*
* nesting interrupt masks.
@@ -82,34 +52,8 @@
#define MIPS_INT_MASK_SPL4 (MIPS_INT_MASK_4|MIPS_INT_MASK_SPL3)
#define MIPS_INT_MASK_SPL5 (MIPS_INT_MASK_5|MIPS_INT_MASK_SPL4)
-#define spl0() (void)_spllower(0)
-#define splx(s) (void)_splset(s)
-#define splvm() _splraise(MIPS_INT_MASK_SPL2)
-#define splsched() _splraise(MIPS_INT_MASK_SPL2)
-#define splhigh() _splraise(MIPS_INT_MASK_SPL2)
-
-#define splsoftclock() _splraise(MIPS_INT_MASK_SPL_SOFT0)
-#define splsoftbio() _splraise(MIPS_INT_MASK_SPL_SOFT0)
-#define splsoftnet() _splraise(MIPS_INT_MASK_SPL_SOFT1)
-#define splsoftserial() _splraise(MIPS_INT_MASK_SPL_SOFT1)
-
-typedef int ipl_t;
-typedef struct {
- int _sr;
-} ipl_cookie_t;
-
-ipl_cookie_t makeiplcookie(ipl_t ipl);
-
-static inline int
-splraiseipl(ipl_cookie_t icookie)
-{
-
- return _splraise(icookie._sr);
-}
-
struct mipsco_intrhand {
- LIST_ENTRY(mipsco_intrhand)
- ih_q;
+ LIST_ENTRY(mipsco_intrhand) ih_q;
int (*ih_fun)(void *);
void *ih_arg;
struct mipsco_intr *ih_intrhead;
@@ -117,14 +61,18 @@
};
struct mipsco_intr {
- LIST_HEAD(,mipsco_intrhand)
- intr_q;
+ LIST_HEAD(,mipsco_intrhand) intr_q;
struct evcnt ih_evcnt;
unsigned long intr_siq;
};
-
+extern const struct ipl_sr_map mipsco_ipl_sr_map;
extern struct mipsco_intrhand intrtab[];
+#define CALL_INTR(lev) ((*intrtab[lev].ih_fun)(intrtab[lev].ih_arg))
+
+#define MAX_INTR_COOKIES 16
+
+#endif /* __INTR_PRIVATE */
#define SYS_INTR_LEVEL0 0
#define SYS_INTR_LEVEL1 1
@@ -139,10 +87,5 @@
#define SYS_INTR_FDC 10
#define SYS_INTR_ATBUS 11
-#define MAX_INTR_COOKIES 16
-
-#define CALL_INTR(lev) ((*intrtab[lev].ih_fun)(intrtab[lev].ih_arg))
-
-#endif /* !_LOCORE */
#endif /* _KERNEL */
#endif /* _MACHINE_INTR_H_ */
Index: src/sys/arch/mipsco/include/sysconf.h
diff -u src/sys/arch/mipsco/include/sysconf.h:1.5 src/sys/arch/mipsco/include/sysconf.h:1.6
--- src/sys/arch/mipsco/include/sysconf.h:1.5 Sat Mar 14 14:46:02 2009
+++ src/sys/arch/mipsco/include/sysconf.h Sun Feb 20 07:56:16 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: sysconf.h,v 1.5 2009/03/14 14:46:02 dsl Exp $ */
+/* $NetBSD: sysconf.h,v 1.6 2011/02/20 07:56:16 matt Exp $ */
/*
* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
@@ -54,7 +54,7 @@
* clkinit - Initialize clocks
*/
void (*cons_init)(void);
- void (*iointr)(unsigned, unsigned, unsigned, unsigned);
+ void (*iointr)(uint32_t, vaddr_t, uint32_t);
int (*memsize)(void *);
void (*intr_establish)(int, int (*)(void *), void *);
void (*clkinit)(void);
Index: src/sys/arch/mipsco/mipsco/autoconf.c
diff -u src/sys/arch/mipsco/mipsco/autoconf.c:1.23 src/sys/arch/mipsco/mipsco/autoconf.c:1.24
--- src/sys/arch/mipsco/mipsco/autoconf.c:1.23 Tue Feb 8 20:20:19 2011
+++ src/sys/arch/mipsco/mipsco/autoconf.c Sun Feb 20 07:56:16 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: autoconf.c,v 1.23 2011/02/08 20:20:19 rmind Exp $ */
+/* $NetBSD: autoconf.c,v 1.24 2011/02/20 07:56:16 matt Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@@ -46,8 +46,9 @@
* and the drivers are initialized.
*/
+#define __INTR_PRIVATE
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.23 2011/02/08 20:20:19 rmind Exp $");
+__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.24 2011/02/20 07:56:16 matt Exp $");
#include <sys/param.h>
#include <sys/systm.h>
Index: src/sys/arch/mipsco/mipsco/bus_dma.c
diff -u src/sys/arch/mipsco/mipsco/bus_dma.c:1.25 src/sys/arch/mipsco/mipsco/bus_dma.c:1.26
--- src/sys/arch/mipsco/mipsco/bus_dma.c:1.25 Fri Aug 21 04:00:57 2009
+++ src/sys/arch/mipsco/mipsco/bus_dma.c Sun Feb 20 07:56:16 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: bus_dma.c,v 1.25 2009/08/21 04:00:57 thorpej Exp $ */
+/* $NetBSD: bus_dma.c,v 1.26 2011/02/20 07:56:16 matt Exp $ */
/*-
* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.25 2009/08/21 04:00:57 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.26 2011/02/20 07:56:16 matt Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -54,8 +54,6 @@
void *, bus_size_t, struct vmspace *, int, paddr_t *,
int *, int);
-extern paddr_t avail_start, avail_end; /* from pmap.c */
-
void
_bus_dma_tag_init(bus_dma_tag_t t)
{
@@ -447,7 +445,7 @@
* NOTE: Even though this is `wbinv_all', since the cache is
* write-through, it just invalidates it.
*/
- if (len >= mips_pdcache_size) {
+ if (len >= mips_cache_info.mci_pdcache_size) {
mips_dcache_wbinv_all();
return;
}
@@ -493,7 +491,7 @@
{
return (_bus_dmamem_alloc_range(t, size, alignment, boundary,
- segs, nsegs, rsegs, flags, avail_start, trunc_page(avail_end)));
+ segs, nsegs, rsegs, flags, mips_avail_start, trunc_page(mips_avail_end)));
}
/*
Index: src/sys/arch/mipsco/mipsco/cpu.c
diff -u src/sys/arch/mipsco/mipsco/cpu.c:1.9 src/sys/arch/mipsco/mipsco/cpu.c:1.10
--- src/sys/arch/mipsco/mipsco/cpu.c:1.9 Sat Mar 14 15:36:10 2009
+++ src/sys/arch/mipsco/mipsco/cpu.c Sun Feb 20 07:56:16 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.9 2009/03/14 15:36:10 dsl Exp $ */
+/* $NetBSD: cpu.c,v 1.10 2011/02/20 07:56:16 matt Exp $ */
/*
* Copyright (c) 1994, 1995 Carnegie-Mellon University.
@@ -28,30 +28,28 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.9 2009/03/14 15:36:10 dsl Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.10 2011/02/20 07:56:16 matt Exp $");
#include <sys/param.h>
#include <sys/device.h>
+#include <sys/cpu.h>
#include <sys/systm.h>
-#include <machine/cpu.h>
#include <machine/autoconf.h>
#include <mips/locore.h>
/* Definition of the driver for autoconfig. */
-static int cpumatch(struct device *, struct cfdata *, void *);
-static void cpuattach(struct device *, struct device *, void *);
+static int cpumatch(device_t, cfdata_t, void *);
+static void cpuattach(device_t, device_t, void *);
-CFATTACH_DECL(cpu, sizeof(struct device),
+CFATTACH_DECL(cpu, 0,
cpumatch, cpuattach, NULL, NULL);
extern struct cfdriver cpu_cd;
-extern void cpu_identify(void);
-
static int
-cpumatch(struct device *parent, struct cfdata *cfdata, void *aux)
+cpumatch(device_t parent, cfdata_t cfdata, void *aux)
{
struct confargs *ca = aux;
@@ -63,9 +61,13 @@
}
static void
-cpuattach(struct device *parent, struct device *dev, void *aux)
+cpuattach(device_t parent, device_t self, void *aux)
{
+ struct cpu_info * const ci = curcpu();
+
+ ci->ci_dev = self;
+ self->dv_private = ci;
- printf(": ");
- cpu_identify();
+ aprint_normal(": ");
+ cpu_identify(self);
}
Index: src/sys/arch/mipsco/mipsco/mainbus.c
diff -u src/sys/arch/mipsco/mipsco/mainbus.c:1.9 src/sys/arch/mipsco/mipsco/mainbus.c:1.10
--- src/sys/arch/mipsco/mipsco/mainbus.c:1.9 Sat Mar 14 15:36:10 2009
+++ src/sys/arch/mipsco/mipsco/mainbus.c Sun Feb 20 07:56:16 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: mainbus.c,v 1.9 2009/03/14 15:36:10 dsl Exp $ */
+/* $NetBSD: mainbus.c,v 1.10 2011/02/20 07:56:16 matt Exp $ */
/*
* Copyright (c) 1994, 1995 Carnegie-Mellon University.
@@ -29,7 +29,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mainbus.c,v 1.9 2009/03/14 15:36:10 dsl Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mainbus.c,v 1.10 2011/02/20 07:56:16 matt Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -38,43 +38,35 @@
#include <machine/autoconf.h>
-struct mainbus_softc {
- struct device sc_dev;
-};
-
/* Definition of the mainbus driver. */
-static int mbmatch(struct device *, struct cfdata *, void *);
-static void mbattach(struct device *, struct device *, void *);
+static int mbmatch(device_t, cfdata_t, void *);
+static void mbattach(device_t, device_t, void *);
static int mbprint(void *, const char *);
-CFATTACH_DECL(mainbus, sizeof(struct mainbus_softc),
+CFATTACH_DECL_NEW(mainbus, 0,
mbmatch, mbattach, NULL, NULL);
-static int mb_attached;
+static bool mb_attached;
static int
-mbmatch(struct device *parent, struct cfdata *cfdata, void *aux)
+mbmatch(device_t parent, cfdata_t cfdata, void *aux)
{
- if (mb_attached)
- return 0;
-
- return 1;
+ return !mb_attached;
}
static void
-mbattach(struct device *parent, struct device *self, void *aux)
+mbattach(device_t parent, device_t self, void *aux)
{
- register struct device *mb = self;
struct confargs nca;
- mb_attached = 1;
+ mb_attached = true;
- printf("\n");
+ aprint_normal("\n");
nca.ca_name = "cpu";
nca.ca_addr = 0;
- config_found(mb, &nca, mbprint);
+ config_found(self, &nca, mbprint);
nca.ca_name = "obio";
nca.ca_addr = 0;
Index: src/sys/arch/mipsco/mipsco/interrupt.c
diff -u src/sys/arch/mipsco/mipsco/interrupt.c:1.10 src/sys/arch/mipsco/mipsco/interrupt.c:1.11
--- src/sys/arch/mipsco/mipsco/interrupt.c:1.10 Mon Dec 20 00:25:38 2010
+++ src/sys/arch/mipsco/mipsco/interrupt.c Sun Feb 20 07:56:16 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: interrupt.c,v 1.10 2010/12/20 00:25:38 matt Exp $ */
+/* $NetBSD: interrupt.c,v 1.11 2011/02/20 07:56:16 matt Exp $ */
/*
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -29,50 +29,40 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
+#define __INTR_PRIVATE
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: interrupt.c,v 1.10 2010/12/20 00:25:38 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: interrupt.c,v 1.11 2011/02/20 07:56:16 matt Exp $");
#include <sys/param.h>
#include <sys/malloc.h>
#include <sys/intr.h>
+#include <sys/lwp.h>
#include <sys/cpu.h>
#include <machine/sysconf.h>
void
-cpu_intr(uint32_t status, uint32_t cause, vaddr_t pc, uint32_t ipending)
+cpu_intr(int ppl, vaddr_t pc, uint32_t status)
{
- struct cpu_info *ci;
+ uint32_t ipending;
+ int ipl;
- ci = curcpu();
- ci->ci_data.cpu_nintr++;
+ curcpu()->ci_data.cpu_nintr++;
- /* device interrupts */
- ci->ci_idepth++;
- (*platform.iointr)(status, cause, pc, ipending);
- ci->ci_idepth--;
-
-#ifdef __HAVE_FAST_SOFTINTS
- /* software simulated interrupt */
- if ((ipending & MIPS_SOFT_INT_MASK_1)
- || (ssir && (status & MIPS_SOFT_INT_MASK_1))) {
- _clrsoftintr(MIPS_SOFT_INT_MASK_1);
- softintr_dispatch();
+ while (ppl < (ipl = splintr(&ipending))) {
+ /* device interrupts */
+ (*platform.iointr)(status, pc, ipending);
}
-#endif
+
}
-static const int ipl_sr_bits[] = {
+const struct ipl_sr_map mipsco_ipl_sr_map = {
+ .sr_bits = {
[IPL_NONE] = 0,
[IPL_SOFTCLOCK] = MIPS_INT_MASK_SPL_SOFT0,
[IPL_SOFTNET] = MIPS_INT_MASK_SPL_SOFT1,
[IPL_VM] = MIPS_INT_MASK_SPL2,
[IPL_SCHED] = MIPS_INT_MASK_SPL2,
+ [IPL_HIGH] = MIPS_INT_MASK,
+ },
};
-
-ipl_cookie_t
-makeiplcookie(ipl_t ipl)
-{
-
- return (ipl_cookie_t){._sr = ipl_sr_bits[ipl]};
-}
Index: src/sys/arch/mipsco/mipsco/machdep.c
diff -u src/sys/arch/mipsco/mipsco/machdep.c:1.73 src/sys/arch/mipsco/mipsco/machdep.c:1.74
--- src/sys/arch/mipsco/mipsco/machdep.c:1.73 Tue Feb 8 20:20:19 2011
+++ src/sys/arch/mipsco/mipsco/machdep.c Sun Feb 20 07:56:16 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: machdep.c,v 1.73 2011/02/08 20:20:19 rmind Exp $ */
+/* $NetBSD: machdep.c,v 1.74 2011/02/20 07:56:16 matt Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@@ -39,7 +39,7 @@
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.73 2011/02/08 20:20:19 rmind Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.74 2011/02/20 07:56:16 matt Exp $");
/* from: Utah Hdr: machdep.c 1.63 91/04/24 */
@@ -112,8 +112,8 @@
phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX];
int mem_cluster_cnt;
-void to_monitor(int) __attribute__((__noreturn__));
-void prom_halt(int) __attribute__((__noreturn__));
+void to_monitor(int) __dead;
+void prom_halt(int) __dead;
#ifdef KGDB
void zs_kgdb_init(void);
@@ -134,22 +134,13 @@
extern void stacktrace(void); /*XXX*/
#endif
-/*
- * safepri is a safe priority for sleep to set for a spin-wait
- * during autoconfiguration or after a panic. Used as an argument to splx().
- * XXX disables interrupt 5 to disable mips3 on-chip clock, which also
- * disables mips1 FPU interrupts.
- */
-int safepri = MIPS3_PSL_LOWIPL; /* XXX */
-
/* locore callback-vector setup */
-extern void mips_vector_init(void);
extern void prom_init(void);
extern void pizazz_init(void);
/* platform-specific initialization vector */
static void unimpl_cons_init(void);
-static void unimpl_iointr(unsigned, unsigned, unsigned, unsigned);
+static void unimpl_iointr(uint32_t, vaddr_t, uint32_t);
static int unimpl_memsize(void *);
static void unimpl_intr_establish(int, int (*)(void *), void *);
@@ -202,7 +193,6 @@
struct btinfo_symtab *bi_syms;
#endif
-
/* Check for valid bootinfo passed from bootstrap */
if (bim == BOOTINFO_MAGIC) {
struct btinfo_magic *bi_magic;
@@ -220,7 +210,14 @@
kernend = (void *)mips_round_page(end);
memset(edata, 0, end - edata);
-#if NKSYMS || defined(DDB) || defined(MODULAR)
+ /*
+ * Copy exception-dispatch code down to exception vector.
+ * Initialize locore-function vector.
+ * Clear out the I and D caches.
+ */
+ mips_vector_init(NULL, false);
+
+#if NKSYMS || defined(DDB) || defined(LKM)
bi_syms = lookup_bootinfo(BTINFO_SYMTAB);
/* Load sysmbol table if present */
@@ -254,13 +251,6 @@
mem_clusters[0].size = ctob(physmem);
mem_cluster_cnt = 1;
- /*
- * Copy exception-dispatch code down to exception vector.
- * Initialize locore-function vector.
- * Clear out the I and D caches.
- */
- mips_vector_init();
-
/* Look at argv[0] and compute bootdev */
makebootdev(argv[0]);
@@ -423,8 +413,7 @@
cpu_reboot(volatile int howto, char *bootstr)
{
/* take a snap shot before clobbering any registers */
- if (curlwp)
- savectx(curpcb);
+ savectx(curpcb);
#ifdef DEBUG
if (panicstr)
@@ -498,7 +487,7 @@
}
static void
-unimpl_iointr(u_int mask, u_int pc, u_int statusreg, u_int causereg)
+unimpl_iointr(uint32_t status, vaddr_t pc, uint32_t ipending)
{
panic("sysconf.init didn't set intr");
Index: src/sys/arch/mipsco/mipsco/mips_3x30.c
diff -u src/sys/arch/mipsco/mipsco/mips_3x30.c:1.12 src/sys/arch/mipsco/mipsco/mips_3x30.c:1.13
--- src/sys/arch/mipsco/mipsco/mips_3x30.c:1.12 Sat Mar 14 21:04:12 2009
+++ src/sys/arch/mipsco/mipsco/mips_3x30.c Sun Feb 20 07:56:16 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: mips_3x30.c,v 1.12 2009/03/14 21:04:12 dsl Exp $ */
+/* $NetBSD: mips_3x30.c,v 1.13 2011/02/20 07:56:16 matt Exp $ */
/*
* Copyright (c) 2000 The NetBSD Foundation, Inc.
@@ -29,30 +29,30 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
+#define __INTR_PRIVATE
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mips_3x30.c,v 1.12 2009/03/14 21:04:12 dsl Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mips_3x30.c,v 1.13 2011/02/20 07:56:16 matt Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/proc.h>
#include <sys/kernel.h>
+#include <sys/cpu.h>
+#include <sys/intr.h>
+#include <machine/locore.h>
#include <machine/trap.h>
#include <machine/psl.h>
-#include <machine/cpu.h>
-#include <machine/intr.h>
#include <machine/mainboard.h>
#include <machine/sysconf.h>
-extern void MachFPInterrupt (u_int, u_int, u_int, struct frame *);
-
/* Local functions */
-void pizazz_init (void);
-void pizazz_intr (u_int, u_int, u_int, u_int);
-int pizazz_level0_intr (void *);
-void pizazz_level5_intr (int, int, int);
-void pizazz_intr_establish (int, int (*)(void *), void *);
+void pizazz_init(void);
+void pizazz_intr(uint32_t, vaddr_t, uint32_t);
+int pizazz_level0_intr(void *);
+void pizazz_level5_intr(uint32_t, vaddr_t);
+void pizazz_intr_establish (int, int (*)(void *), void *);
#define INT_MASK_FPU MIPS_INT_MASK_3
@@ -64,6 +64,8 @@
platform.iointr = pizazz_intr;
platform.intr_establish = pizazz_intr_establish;
+ ipl_sr_map = mipsco_ipl_sr_map;
+
pizazz_intr_establish(SYS_INTR_LEVEL0, pizazz_level0_intr, NULL);
strcpy(cpu_model, "Mips 3230 Magnum (Pizazz)");
@@ -78,10 +80,7 @@
} while (0)
void
-pizazz_intr(u_int status, u_int cause, u_int pc, u_int ipending)
- /* status: status register at time of the exception */
- /* cause: cause register at time of exception */
- /* pc: program counter where to continue */
+pizazz_intr(uint32_t status, vaddr_t pc, uint32_t ipending)
{
/* handle clock interrupts ASAP */
if (ipending & MIPS_INT_MASK_2) { /* Timer Interrupt */
@@ -90,37 +89,27 @@
cf.pc = pc;
cf.sr = status;
+ cf.intr = (curcpu()->ci_idepth > 0);
rambo_clkintr(&cf);
-
- /* keep clock interrupts enabled when we return */
- cause &= ~MIPS_INT_MASK_2;
}
- /* If clock interrupts were enabled, re-enable them ASAP. */
- _splset(MIPS_SR_INT_IE | (status & MIPS_INT_MASK_2));
-
if (ipending & MIPS_INT_MASK_5) /* level 5 interrupt */
- pizazz_level5_intr(pc, cause, status);
+ pizazz_level5_intr(status, pc);
HANDLE_INTR(SYS_INTR_FDC, MIPS_INT_MASK_4);
HANDLE_INTR(SYS_INTR_SCSI, MIPS_INT_MASK_1);
HANDLE_INTR(SYS_INTR_LEVEL0, MIPS_INT_MASK_0);
- /* XXX: Keep FDC interrupt masked off */
- cause &= ~(MIPS_INT_MASK_0 | MIPS_INT_MASK_1 | MIPS_INT_MASK_5);
-
- _splset((status & ~cause & MIPS_HARD_INT_MASK) | MIPS_SR_INT_IE);
-
+#if !defined(NOFPU)
/* FPU nofiticaition */
if (ipending & INT_MASK_FPU) {
if (!USERMODE(status))
- panic("kernel used FPU: PC %x, CR %x, SR %x",
- pc, cause, status);
-#if !defined(SOFTFLOAT)
- MachFPInterrupt(status, cause, pc, curlwp->l_md.md_regs);
-#endif
+ panic("kernel used FPU: PC %x, SR %x",
+ pc, status);
+ mips_fpu_intr(pc, curlwp->l_md.md_utf);
}
+#endif
}
/*
@@ -153,13 +142,13 @@
* Motherboard Parity Error
*/
void
-pizazz_level5_intr(int pc, int cause, int status)
+pizazz_level5_intr(uint32_t status, vaddr_t pc)
{
u_int32_t ereg;
ereg = *(u_int32_t *)RAMBO_ERREG;
- printf("interrupt: pc=%p cr=%x sr=%x\n", (void *)pc, cause, status);
+ printf("interrupt: pc=%p sr=%x\n", (void *)pc, status);
printf("parity error: %p mask: 0x%x\n", (void *)ereg, ereg & 0xf);
panic("memory fault");
}
