Module Name: src
Committed By: kiyohara
Date: Mon Dec 24 06:41:02 UTC 2012
Modified Files:
src/sys/arch/arm/omap: omap3_ehci.c
Log Message:
Don't wait DPLL5 lock, if set to automatic mode. It is locked by 120 MHz
being supplied.
Also enable EN_USBHOST2(120MHz) in usbhost_init().
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/omap/omap3_ehci.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/omap/omap3_ehci.c
diff -u src/sys/arch/arm/omap/omap3_ehci.c:1.5 src/sys/arch/arm/omap/omap3_ehci.c:1.6
--- src/sys/arch/arm/omap/omap3_ehci.c:1.5 Wed Dec 12 00:33:45 2012
+++ src/sys/arch/arm/omap/omap3_ehci.c Mon Dec 24 06:41:02 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: omap3_ehci.c,v 1.5 2012/12/12 00:33:45 matt Exp $ */
+/* $NetBSD: omap3_ehci.c,v 1.6 2012/12/24 06:41:02 kiyohara Exp $ */
/*-
* Copyright (c) 2010-2012 Jared D. McNeill <jmcne...@invisible.ca>
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: omap3_ehci.c,v 1.5 2012/12/12 00:33:45 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: omap3_ehci.c,v 1.6 2012/12/24 06:41:02 kiyohara Exp $");
#include "locators.h"
@@ -97,7 +97,7 @@ __KERNEL_RCSID(0, "$NetBSD: omap3_ehci.c
/* USBHOST_CM registers */
#define CM_FCLKEN_USBHOST 0x00
#define EN_USBHOST1 1 /* USB HOST 48 MHz clock enable */
-#define EN_USBHOST2 2 /* USB HOST 1280 MHz clock enable */
+#define EN_USBHOST2 2 /* USB HOST 120 MHz clock enable */
#define CM_ICLKEN_USBHOST 0x10
#define EN_USBHOST 1 /* USB HOST clock enable */
#define CM_IDLEST_USBHOST 0x20
@@ -429,8 +429,8 @@ dpll5_init(struct omap3_ehci_softc *sc)
{
bus_space_tag_t iot = sc->sc.iot;
bus_space_handle_t ioh;
- uint32_t m, n, m2, v;
- int retry = 1000, err;
+ uint32_t m, n, m2;
+ int err;
if (sc->sc_dpll5.m == 0 || sc->sc_dpll5.n == 0 || sc->sc_dpll5.m2 == 0)
return;
@@ -462,13 +462,6 @@ dpll5_init(struct omap3_ehci_softc *sc)
/* Put DPLL5 into low power stop mode when the 120MHz clock is not required (restarted automatically) */
bus_space_write_4(iot, ioh, CM_AUTOIDLE2_PLL, AUTO_PERIPH2_DPLL);
- /* Wait for DPLL5 lock */
- while (((v = bus_space_read_4(iot, ioh, CM_IDLEST2_CKGEN)) & ST_PERIPH2_CLK) == 0 && --retry > 0) {
- delay(100);
- }
- if (retry == 0)
- printf("%s: timeout\n", __func__);
-
bus_space_unmap(iot, ioh, CCR_CM_SIZE);
}
@@ -490,9 +483,9 @@ usbhost_init(struct omap3_ehci_softc *sc
r = bus_space_read_4(iot, ioh, CM_FCLKEN_USBHOST);
if (enable)
- r |= EN_USBHOST1;
+ r |= (EN_USBHOST1 | EN_USBHOST2);
else
- r &= ~EN_USBHOST1;
+ r &= ~(EN_USBHOST1 | EN_USBHOST2);
bus_space_write_4(iot, ioh, CM_FCLKEN_USBHOST, r);
r = bus_space_read_4(iot, ioh, CM_ICLKEN_USBHOST);
