Module Name: src
Committed By: matt
Date: Thu Jan 31 22:34:26 UTC 2013
Modified Files:
src/sys/arch/arm/arm32: arm32_machdep.c cpu.c
Log Message:
Add simple sysctls for cpu_id, fpu_id, neon_present, simd_present,
simdex_present.
Add struct sysctls to return the isar, mmfr, pfr, and mvfr sets.
To generate a diff of this commit:
cvs rdiff -u -r1.90 -r1.91 src/sys/arch/arm/arm32/arm32_machdep.c
cvs rdiff -u -r1.91 -r1.92 src/sys/arch/arm/arm32/cpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm32/arm32_machdep.c
diff -u src/sys/arch/arm/arm32/arm32_machdep.c:1.90 src/sys/arch/arm/arm32/arm32_machdep.c:1.91
--- src/sys/arch/arm/arm32/arm32_machdep.c:1.90 Mon Jan 28 23:49:12 2013
+++ src/sys/arch/arm/arm32/arm32_machdep.c Thu Jan 31 22:34:26 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: arm32_machdep.c,v 1.90 2013/01/28 23:49:12 matt Exp $ */
+/* $NetBSD: arm32_machdep.c,v 1.91 2013/01/31 22:34:26 matt Exp $ */
/*
* Copyright (c) 1994-1998 Mark Brinicombe.
@@ -42,7 +42,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: arm32_machdep.c,v 1.90 2013/01/28 23:49:12 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: arm32_machdep.c,v 1.91 2013/01/31 22:34:26 matt Exp $");
#include "opt_modular.h"
#include "opt_md.h"
@@ -98,6 +98,14 @@ extern paddr_t msgbufphys;
int kernel_debug = 0;
int cpu_fpu_present;
+int cpu_neon_present;
+int cpu_simd_present;
+int cpu_simdex_present;
+
+int cpu_instruction_set_attributes[6];
+int cpu_memory_model_features[4];
+int cpu_processor_features[2];
+int cpu_media_and_vfp_features[2];
/* exported variable to be filled in by the bootloaders */
char *booted_kernel;
@@ -362,10 +370,65 @@ SYSCTL_SETUP(sysctl_machdep_setup, "sysc
sysctl_machdep_powersave, 0, &cpu_do_powersave, 0,
CTL_MACHDEP, CPU_POWERSAVE, CTL_EOL);
sysctl_createv(clog, 0, NULL, NULL,
+ CTLFLAG_PERMANENT|CTLFLAG_IMMEDIATE,
+ CTLTYPE_INT, "cpu_id", NULL,
+ NULL, curcpu()->ci_arm_cpuid, NULL, 0,
+ CTL_MACHDEP, CTL_CREATE, CTL_EOL);
+#ifdef FPU_VFP
+ sysctl_createv(clog, 0, NULL, NULL,
+ CTLFLAG_PERMANENT|CTLFLAG_READONLY,
+ CTLTYPE_INT, "fpu_id", NULL,
+ NULL, 0, &cpu_info_store.ci_vfp_id, 0,
+ CTL_MACHDEP, CTL_CREATE, CTL_EOL);
+#endif
+ sysctl_createv(clog, 0, NULL, NULL,
CTLFLAG_PERMANENT|CTLFLAG_READONLY,
CTLTYPE_INT, "fpu_present", NULL,
NULL, 0, &cpu_fpu_present, 0,
CTL_MACHDEP, CTL_CREATE, CTL_EOL);
+ sysctl_createv(clog, 0, NULL, NULL,
+ CTLFLAG_PERMANENT|CTLFLAG_READONLY,
+ CTLTYPE_INT, "neon_present", NULL,
+ NULL, 0, &cpu_neon_present, 0,
+ CTL_MACHDEP, CTL_CREATE, CTL_EOL);
+ sysctl_createv(clog, 0, NULL, NULL,
+ CTLFLAG_PERMANENT|CTLFLAG_READONLY,
+ CTLTYPE_STRUCT, "id_isar", NULL,
+ NULL, 0,
+ cpu_instruction_set_attributes,
+ sizeof(cpu_instruction_set_attributes),
+ CTL_MACHDEP, CTL_CREATE, CTL_EOL);
+ sysctl_createv(clog, 0, NULL, NULL,
+ CTLFLAG_PERMANENT|CTLFLAG_READONLY,
+ CTLTYPE_STRUCT, "id_mmfr", NULL,
+ NULL, 0,
+ cpu_memory_model_features,
+ sizeof(cpu_memory_model_features),
+ CTL_MACHDEP, CTL_CREATE, CTL_EOL);
+ sysctl_createv(clog, 0, NULL, NULL,
+ CTLFLAG_PERMANENT|CTLFLAG_READONLY,
+ CTLTYPE_STRUCT, "id_pfr", NULL,
+ NULL, 0,
+ cpu_processor_features,
+ sizeof(cpu_processor_features),
+ CTL_MACHDEP, CTL_CREATE, CTL_EOL);
+ sysctl_createv(clog, 0, NULL, NULL,
+ CTLFLAG_PERMANENT|CTLFLAG_READONLY,
+ CTLTYPE_STRUCT, "id_mvfr", NULL,
+ NULL, 0,
+ cpu_media_and_vfp_features,
+ sizeof(cpu_media_and_vfp_features),
+ CTL_MACHDEP, CTL_CREATE, CTL_EOL);
+ sysctl_createv(clog, 0, NULL, NULL,
+ CTLFLAG_PERMANENT|CTLFLAG_READONLY,
+ CTLTYPE_INT, "simd_present", NULL,
+ NULL, 0, &cpu_simd_present, 0,
+ CTL_MACHDEP, CTL_CREATE, CTL_EOL);
+ sysctl_createv(clog, 0, NULL, NULL,
+ CTLFLAG_PERMANENT|CTLFLAG_READONLY,
+ CTLTYPE_INT, "simdex_present", NULL,
+ NULL, 0, &cpu_simdex_present, 0,
+ CTL_MACHDEP, CTL_CREATE, CTL_EOL);
}
void
Index: src/sys/arch/arm/arm32/cpu.c
diff -u src/sys/arch/arm/arm32/cpu.c:1.91 src/sys/arch/arm/arm32/cpu.c:1.92
--- src/sys/arch/arm/arm32/cpu.c:1.91 Wed Dec 5 19:05:45 2012
+++ src/sys/arch/arm/arm32/cpu.c Thu Jan 31 22:34:26 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.91 2012/12/05 19:05:45 matt Exp $ */
+/* $NetBSD: cpu.c,v 1.92 2013/01/31 22:34:26 matt Exp $ */
/*
* Copyright (c) 1995 Mark Brinicombe.
@@ -46,7 +46,7 @@
#include <sys/param.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.91 2012/12/05 19:05:45 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.92 2013/01/31 22:34:26 matt Exp $");
#include <sys/systm.h>
#include <sys/conf.h>
@@ -648,11 +648,10 @@ identify_arm_cpu(device_t dv, struct cpu
aprint_normal("\n");
-#if defined(CPU_CORTEX)
- if (CPU_ID_CORTEX_P(cpuid)) {
+ if (CPU_ID_CORTEX_P(cpuid) || CPU_ID_ARM11_P(cpuid)) {
identify_features(dv);
}
-#endif
+
/* Print cache info. */
if (arm_pcache.icache_line_size != 0 || arm_pcache.dcache_line_size != 0) {
print_cache_info(dv, &arm_pcache, 0);
@@ -727,42 +726,57 @@ identify_arm_cpu(device_t dv, struct cpu
}
}
-#if defined(CPU_CORTEX)
+extern int cpu_instruction_set_attributes[6];
+extern int cpu_memory_model_features[4];
+extern int cpu_processor_features[2];
+extern int cpu_simd_present;
+extern int cpu_simdex_present;
+
void
identify_features(device_t dv)
{
- uint32_t isar0 = armreg_isar0_read();
- uint32_t isar1 = armreg_isar1_read();
- uint32_t isar2 = armreg_isar2_read();
- uint32_t isar3 = armreg_isar3_read();
- uint32_t isar4 = armreg_isar4_read();
- uint32_t isar5 = armreg_isar5_read();
-
- uint32_t mmfr0 = armreg_mmfr0_read();
- uint32_t mmfr1 = armreg_mmfr1_read();
- uint32_t mmfr2 = armreg_mmfr2_read();
- uint32_t mmfr3 = armreg_mmfr3_read();
+ cpu_instruction_set_attributes[0] = armreg_isar0_read();
+ cpu_instruction_set_attributes[1] = armreg_isar1_read();
+ cpu_instruction_set_attributes[2] = armreg_isar2_read();
+ cpu_instruction_set_attributes[3] = armreg_isar3_read();
+ cpu_instruction_set_attributes[4] = armreg_isar4_read();
+ cpu_instruction_set_attributes[5] = armreg_isar5_read();
+
+ cpu_simd_present =
+ ((cpu_instruction_set_attributes[3] >> 4) & 0x0f) >= 3;
+ cpu_simdex_present = cpu_simd_present
+ && ((cpu_instruction_set_attributes[1] >> 12) & 0x0f) >= 2;
+
+ cpu_memory_model_features[0] = armreg_mmfr0_read();
+ cpu_memory_model_features[1] = armreg_mmfr1_read();
+ cpu_memory_model_features[2] = armreg_mmfr2_read();
+ cpu_memory_model_features[3] = armreg_mmfr3_read();
- if (__SHIFTOUT(mmfr3, __BITS(23,20))) {
+ if (__SHIFTOUT(cpu_memory_model_features[3], __BITS(23,20))) {
/*
* Updates to the translation tables do not require a clean
- * to the point of unification to ensure visibility by subsequent
- * translation table walks.
+ * to the point of unification to ensure visibility by
+ * subsequent translation table walks.
*/
pmap_needs_pte_sync = 0;
}
- uint32_t pfr0 = armreg_pfr0_read();
- uint32_t pfr1 = armreg_pfr1_read();
+ cpu_processor_features[0] = armreg_pfr0_read();
+ cpu_processor_features[1] = armreg_pfr1_read();
aprint_verbose_dev(dv,
"isar: [0]=%#x [1]=%#x [2]=%#x [3]=%#x, [4]=%#x, [5]=%#x\n",
- isar0, isar1, isar2, isar3, isar4, isar5);
+ cpu_instruction_set_attributes[0],
+ cpu_instruction_set_attributes[1],
+ cpu_instruction_set_attributes[2],
+ cpu_instruction_set_attributes[3],
+ cpu_instruction_set_attributes[4],
+ cpu_instruction_set_attributes[5]);
aprint_verbose_dev(dv,
"mmfr: [0]=%#x [1]=%#x [2]=%#x [3]=%#x\n",
- mmfr0, mmfr1, mmfr2, mmfr3);
+ cpu_memory_model_features[0], cpu_memory_model_features[1],
+ cpu_memory_model_features[2], cpu_memory_model_features[3]);
aprint_verbose_dev(dv,
"pfr: [0]=%#x [1]=%#x\n",
- pfr0, pfr1);
+ cpu_processor_features[0], cpu_processor_features[1]);
}
-#endif /* CPU_CORTEX */
