Module Name: src
Committed By: matt
Date: Wed Dec 18 14:49:47 UTC 2013
Modified Files:
src/gnu/dist/gcc4/gcc [matt-nb5-mips64]: config.gcc
src/gnu/dist/gcc4/gcc/config/arm [matt-nb5-mips64]: arm-cores.def arm.c
arm.h netbsd-elf.h
Log Message:
Make gcc4.1 aware of cortex-a[89]/armv7a and be8 linking. cortex is
treated as arm11.
To generate a diff of this commit:
cvs rdiff -u -r1.19.8.2 -r1.19.8.3 src/gnu/dist/gcc4/gcc/config.gcc
cvs rdiff -u -r1.1.1.1 -r1.1.1.1.32.1 \
src/gnu/dist/gcc4/gcc/config/arm/arm-cores.def \
src/gnu/dist/gcc4/gcc/config/arm/arm.h \
src/gnu/dist/gcc4/gcc/config/arm/netbsd-elf.h
cvs rdiff -u -r1.1.1.4 -r1.1.1.4.16.1 src/gnu/dist/gcc4/gcc/config/arm/arm.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/gnu/dist/gcc4/gcc/config.gcc
diff -u src/gnu/dist/gcc4/gcc/config.gcc:1.19.8.2 src/gnu/dist/gcc4/gcc/config.gcc:1.19.8.3
--- src/gnu/dist/gcc4/gcc/config.gcc:1.19.8.2 Thu May 6 06:19:02 2010
+++ src/gnu/dist/gcc4/gcc/config.gcc Wed Dec 18 14:49:46 2013
@@ -668,7 +668,13 @@ arm*-*-netbsdelf*)
tm_file="dbxelf.h elfos.h netbsd.h netbsd-elf.h arm/elf.h arm/aout.h arm/arm.h arm/netbsd-elf.h"
tmake_file="${tmake_file} arm/t-arm arm/t-netbsd"
case ${target} in
- armeb*) tm_defines="${tm_defines} TARGET_ENDIAN_DEFAULT=MASK_BIG_END" ;;
+ arm*eb-*) tm_defines="${tm_defines} TARGET_ENDIAN_DEFAULT=MASK_BIG_END" ;;
+ esac
+ case ${target} in
+ armv4*) with_cpu=${with_cpu:-strongarm};;
+ armv5*) with_cpu=${with_cpu:-arm9e};;
+ armv6*) with_cpu=${with_cpu:-arm1176jzf-s};;
+ armv7*) with_cpu=${with_cpu:-cortex-a8};;
esac
;;
arm*-*-netbsd*)
@@ -2569,7 +2575,7 @@ case "${target}" in
case "$with_arch" in
"" \
| armv[23456] | armv2a | armv3m | armv4t | armv5t \
- | armv5te | armv6j |armv6k | armv6z | armv6zk \
+ | armv5te | armv6j |armv6k | armv6z | armv6zk | armv7a \
| iwmmxt | ep9312)
# OK
;;
Index: src/gnu/dist/gcc4/gcc/config/arm/arm-cores.def
diff -u src/gnu/dist/gcc4/gcc/config/arm/arm-cores.def:1.1.1.1 src/gnu/dist/gcc4/gcc/config/arm/arm-cores.def:1.1.1.1.32.1
--- src/gnu/dist/gcc4/gcc/config/arm/arm-cores.def:1.1.1.1 Thu Apr 20 09:50:55 2006
+++ src/gnu/dist/gcc4/gcc/config/arm/arm-cores.def Wed Dec 18 14:49:46 2013
@@ -115,3 +115,7 @@ ARM_CORE("arm1176jz-s", arm1176jzs, 6Z
ARM_CORE("arm1176jzf-s", arm1176jzfs, 6ZK, FL_LDSCHED | FL_VFPV2, 9e)
ARM_CORE("mpcorenovfp", mpcorenovfp, 6K, FL_LDSCHED, 9e)
ARM_CORE("mpcore", mpcore, 6K, FL_LDSCHED | FL_VFPV2, 9e)
+
+/* V7 Architecture Processors */
+ARM_CORE("cortex-a8", cortexa8, 7A, FL_LDSCHED | FL_VFPV2, 9e)
+ARM_CORE("cortex-a9", cortexa9, 7A, FL_LDSCHED | FL_VFPV2, 9e)
Index: src/gnu/dist/gcc4/gcc/config/arm/arm.h
diff -u src/gnu/dist/gcc4/gcc/config/arm/arm.h:1.1.1.1 src/gnu/dist/gcc4/gcc/config/arm/arm.h:1.1.1.1.32.1
--- src/gnu/dist/gcc4/gcc/config/arm/arm.h:1.1.1.1 Thu Apr 20 09:50:52 2006
+++ src/gnu/dist/gcc4/gcc/config/arm/arm.h Wed Dec 18 14:49:46 2013
@@ -77,7 +77,12 @@ extern char arm_arch_name[];
if (arm_arch_iwmmxt) \
builtin_define ("__IWMMXT__"); \
if (TARGET_AAPCS_BASED) \
- builtin_define ("__ARM_EABI__"); \
+ { \
+ builtin_define ("__ARM_EABI__"); \
+ builtin_define ("__ARM_PCS"); \
+ if (TARGET_HARD_FLOAT && TARGET_VFP) \
+ builtin_define ("__ARM_PCS_VFP"); \
+ } \
} while (0)
/* The various ARM cores. */
Index: src/gnu/dist/gcc4/gcc/config/arm/netbsd-elf.h
diff -u src/gnu/dist/gcc4/gcc/config/arm/netbsd-elf.h:1.1.1.1 src/gnu/dist/gcc4/gcc/config/arm/netbsd-elf.h:1.1.1.1.32.1
--- src/gnu/dist/gcc4/gcc/config/arm/netbsd-elf.h:1.1.1.1 Thu Apr 20 09:51:16 2006
+++ src/gnu/dist/gcc4/gcc/config/arm/netbsd-elf.h Wed Dec 18 14:49:46 2013
@@ -61,10 +61,19 @@
"%{mhard-float:{!mfpu=*:-mfpu=vfp}} \
%{mfloat-abi=hard:{!mfpu=*:-mfpu=vfp}}"
+#define TARGET_FIX_V4BX_SPEC " %{mcpu=arm8|mcpu=arm810|mcpu=strongarm*|march=armv4:--fix-v4bx}"
+#if TARGET_ENDIAN_DEFAULT == MASK_BIG_END
+#define BE8_LINK_SPEC " %{!mlittle-endian:%{march=armv7*|mcpu=cortex*:%{!r:--be8}}}"
+#else
+#define BE8_LINK_SPEC " %{mbig-endian:%{march=armv7*|mcpu=cortex*:%{!r:--be8}}}"
+#endif
+
#undef SUBTARGET_EXTRA_SPECS
#define SUBTARGET_EXTRA_SPECS \
{ "subtarget_extra_asm_spec", SUBTARGET_EXTRA_ASM_SPEC }, \
{ "subtarget_asm_float_spec", SUBTARGET_ASM_FLOAT_SPEC }, \
+ { "be8_link_spec", BE8_LINK_SPEC }, \
+ { "target_fix_v4bx_spec", TARGET_FIX_V4BX_SPEC }, \
{ "netbsd_link_spec", NETBSD_LINK_SPEC_ELF }, \
{ "netbsd_entry_point", NETBSD_ENTRY_POINT },
@@ -73,6 +82,7 @@
#undef LINK_SPEC
#define LINK_SPEC \
"-X %{mbig-endian:-EB} %{mlittle-endian:-EL} \
+ %(be8_link_spec) %(target_fix_v4bx_spec) \
%(netbsd_link_spec)"
/* Make GCC agree with <machine/ansi.h>. */
Index: src/gnu/dist/gcc4/gcc/config/arm/arm.c
diff -u src/gnu/dist/gcc4/gcc/config/arm/arm.c:1.1.1.4 src/gnu/dist/gcc4/gcc/config/arm/arm.c:1.1.1.4.16.1
--- src/gnu/dist/gcc4/gcc/config/arm/arm.c:1.1.1.4 Sat Feb 2 22:48:58 2008
+++ src/gnu/dist/gcc4/gcc/config/arm/arm.c Wed Dec 18 14:49:46 2013
@@ -433,6 +433,7 @@ static int thumb_call_reg_needed;
#define FL_WBUF (1 << 14) /* Schedule for write buffer ops.
Note: ARM6 & 7 derivatives only. */
#define FL_ARCH6K (1 << 15) /* Architecture rel 6 K extensions. */
+#define FL_ARCH7A (1 << 16) /* Architecture rel 7. */
#define FL_IWMMXT (1 << 29) /* XScale v2 or "Intel Wireless MMX technology". */
@@ -451,6 +452,7 @@ static int thumb_call_reg_needed;
#define FL_FOR_ARCH6K (FL_FOR_ARCH6 | FL_ARCH6K)
#define FL_FOR_ARCH6Z FL_FOR_ARCH6
#define FL_FOR_ARCH6ZK FL_FOR_ARCH6K
+#define FL_FOR_ARCH7A (FL_ARCH7A | FL_FOR_ARCH6K)
/* The bits in this mask specify which
instructions we are allowed to generate. */
@@ -484,6 +486,9 @@ int arm_arch6 = 0;
/* Nonzero if this chip supports the ARM 6K extensions. */
int arm_arch6k = 0;
+/* Nonzero if this chip supports the ARM Architecutre 7 extensions. */
+int arm_arch7 = 0;
+
/* Nonzero if this chip can benefit from load scheduling. */
int arm_ld_sched = 0;
@@ -596,6 +601,7 @@ static const struct processors all_archi
{"armv6k", mpcore, "6K", FL_CO_PROC | FL_FOR_ARCH6K, NULL},
{"armv6z", arm1176jzs, "6Z", FL_CO_PROC | FL_FOR_ARCH6Z, NULL},
{"armv6zk", arm1176jzs, "6ZK", FL_CO_PROC | FL_FOR_ARCH6ZK, NULL},
+ {"armv7a", cortexa8, "7A", FL_CO_PROC | FL_FOR_ARCH7A, NULL},
{"ep9312", ep9312, "4T", FL_LDSCHED | FL_CIRRUS | FL_FOR_ARCH4, NULL},
{"iwmmxt", iwmmxt, "5TE", FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT , NULL},
{NULL, arm_none, NULL, 0 , NULL}
@@ -1100,6 +1106,7 @@ arm_override_options (void)
arm_arch5e = (insn_flags & FL_ARCH5E) != 0;
arm_arch6 = (insn_flags & FL_ARCH6) != 0;
arm_arch6k = (insn_flags & FL_ARCH6K) != 0;
+ arm_arch7 = (insn_flags & FL_ARCH7A) != 0;
arm_arch_xscale = (insn_flags & FL_XSCALE) != 0;
arm_arch_cirrus = (insn_flags & FL_CIRRUS) != 0;
