Module Name: src
Committed By: jmcneill
Date: Sun Oct 19 15:37:25 UTC 2014
Modified Files:
src/sys/arch/arm/allwinner: awin_reg.h
Log Message:
add A31 GMAC module base and clk reg offset
To generate a diff of this commit:
cvs rdiff -u -r1.37 -r1.38 src/sys/arch/arm/allwinner/awin_reg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/allwinner/awin_reg.h
diff -u src/sys/arch/arm/allwinner/awin_reg.h:1.37 src/sys/arch/arm/allwinner/awin_reg.h:1.38
--- src/sys/arch/arm/allwinner/awin_reg.h:1.37 Wed Oct 15 23:28:37 2014
+++ src/sys/arch/arm/allwinner/awin_reg.h Sun Oct 19 15:37:25 2014
@@ -1700,6 +1700,7 @@ struct awin_mmc_idma_descriptor {
#define AWIN_A31_USB1_OFFSET 0x0001a000 /* EHCI0/OHCI0 */
#define AWIN_A31_USB2_OFFSET 0x0001b000 /* EHCI1/OHCI1 */
#define AWIN_A31_USB3_OFFSET 0x0001c000 /* OHCI2 */
+#define AWIN_A31_GMAC_OFFSET 0x00030000 /* GMAC */
#define AWIN_A31_PRCM_OFFSET 0x00301400 /* PRCM */
#define AWIN_A31_CPUCFG_OFFSET 0x00301C00
#define AWIN_A31_RTC_OFFSET 0x00300000 /* RTC */
@@ -1720,6 +1721,7 @@ struct awin_mmc_idma_descriptor {
#define AWIN_A31_CPU_AXI_CFG_REG 0x0050
+#define AWIN_A31_GMAC_CLK_REG 0x00D0
#define AWIN_A31_AHB_RESET0_REG 0x02C0
#define AWIN_A31_AHB_RESET1_REG 0x02C4
#define AWIN_A31_AHB_RESET2_REG 0x02C8
