Module Name: src
Committed By: jmcneill
Date: Fri Jan 2 23:20:18 UTC 2015
Modified Files:
src/sys/arch/arm/rockchip: files.rockchip
Added Files:
src/sys/arch/arm/rockchip: rockchip_timer.c rockchip_timerreg.h
Log Message:
Add driver for RK3188 64-bit timer.
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/rockchip/files.rockchip
cvs rdiff -u -r0 -r1.1 src/sys/arch/arm/rockchip/rockchip_timer.c \
src/sys/arch/arm/rockchip/rockchip_timerreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/files.rockchip
diff -u src/sys/arch/arm/rockchip/files.rockchip:1.6 src/sys/arch/arm/rockchip/files.rockchip:1.7
--- src/sys/arch/arm/rockchip/files.rockchip:1.6 Fri Jan 2 21:59:29 2015
+++ src/sys/arch/arm/rockchip/files.rockchip Fri Jan 2 23:20:18 2015
@@ -1,4 +1,4 @@
-# $NetBSD: files.rockchip,v 1.6 2015/01/02 21:59:29 jmcneill Exp $
+# $NetBSD: files.rockchip,v 1.7 2015/01/02 23:20:18 jmcneill Exp $
#
# Configuration info for Rockchip ARM Peripherals
#
@@ -32,6 +32,11 @@ device rkiic: i2cbus, i2cexec
attach rkiic at obio
file arch/arm/rockchip/rockchip_i2c.c rkiic
+# Timer
+device rktimer
+attach rktimer at obio
+file arch/arm/rockchip/rockchip_timer.c rktimer
+
# SD/MMC (Synopsys DesignWare)
attach dwcmmc at obio with rkdwcmmc
file arch/arm/rockchip/rockchip_dwcmmc.c rkdwcmmc
Added files:
Index: src/sys/arch/arm/rockchip/rockchip_timer.c
diff -u /dev/null src/sys/arch/arm/rockchip/rockchip_timer.c:1.1
--- /dev/null Fri Jan 2 23:20:18 2015
+++ src/sys/arch/arm/rockchip/rockchip_timer.c Fri Jan 2 23:20:18 2015
@@ -0,0 +1,107 @@
+/* $NetBSD: rockchip_timer.c,v 1.1 2015/01/02 23:20:18 jmcneill Exp $ */
+
+/*-
+ * Copyright (c) 2015 Jared D. McNeill <jmcne...@invisible.ca>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: rockchip_timer.c,v 1.1 2015/01/02 23:20:18 jmcneill Exp $");
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/device.h>
+#include <sys/intr.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/timetc.h>
+
+#include <arm/rockchip/rockchip_reg.h>
+#include <arm/rockchip/rockchip_var.h>
+
+#include <arm/rockchip/rockchip_timerreg.h>
+
+struct rktimer_softc {
+ device_t sc_dev;
+ bus_space_tag_t sc_bst;
+ bus_space_handle_t sc_bsh;
+ struct timecounter sc_tc;
+};
+
+#define TIMER_READ(sc, reg) \
+ bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg))
+#define TIMER_WRITE(sc, reg, val) \
+ bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
+
+static int rktimer_match(device_t, cfdata_t, void *);
+static void rktimer_attach(device_t, device_t, void *);
+
+static u_int rktimer_get_timecount(struct timecounter *);
+
+CFATTACH_DECL_NEW(rktimer, sizeof(struct rktimer_softc),
+ rktimer_match, rktimer_attach, NULL, NULL);
+
+static int
+rktimer_match(device_t parent, cfdata_t cf, void *aux)
+{
+ return 1;
+}
+
+static void
+rktimer_attach(device_t parent, device_t self, void *aux)
+{
+ struct rktimer_softc *sc = device_private(self);
+ struct obio_attach_args * const obio = aux;
+
+ sc->sc_dev = self;
+ sc->sc_bst = obio->obio_bst;
+ bus_space_subregion(obio->obio_bst, obio->obio_bsh, obio->obio_offset,
+ obio->obio_size, &sc->sc_bsh);
+
+ aprint_naive("\n");
+ aprint_normal("\n");
+
+ TIMER_WRITE(sc, TIMER0_CONTROL_REG, 0);
+ TIMER_WRITE(sc, TIMER0_LOAD_COUNT0_REG, 0xffffffff);
+ TIMER_WRITE(sc, TIMER0_LOAD_COUNT1_REG, 0xffffffff);
+ TIMER_WRITE(sc, TIMER0_CONTROL_REG, TIMER_CONTROL_ENABLE);
+
+ sc->sc_tc.tc_get_timecount = rktimer_get_timecount;
+ sc->sc_tc.tc_poll_pps = NULL;
+ sc->sc_tc.tc_counter_mask = ~0;
+ sc->sc_tc.tc_frequency = ROCKCHIP_REF_FREQ;
+ sc->sc_tc.tc_name = "TIMER0";
+ sc->sc_tc.tc_priv = sc;
+ sc->sc_tc.tc_quality = 900;
+
+ tc_init(&sc->sc_tc);
+}
+
+static u_int
+rktimer_get_timecount(struct timecounter *tc)
+{
+ struct rktimer_softc *sc = tc->tc_priv;
+
+ return ~TIMER_READ(sc, TIMER0_CURRENT_VALUE0_REG);
+}
Index: src/sys/arch/arm/rockchip/rockchip_timerreg.h
diff -u /dev/null src/sys/arch/arm/rockchip/rockchip_timerreg.h:1.1
--- /dev/null Fri Jan 2 23:20:18 2015
+++ src/sys/arch/arm/rockchip/rockchip_timerreg.h Fri Jan 2 23:20:18 2015
@@ -0,0 +1,78 @@
+/* $NetBSD: rockchip_timerreg.h,v 1.1 2015/01/02 23:20:18 jmcneill Exp $ */
+
+/*-
+ * Copyright (c) 2015 Jared D. McNeill <jmcne...@invisible.ca>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _ROCKCHIP_TIMERREG_H
+#define _ROCKCHIP_TIMERREG_H
+
+#define TIMER0_LOAD_COUNT0_REG 0x0000
+#define TIMER0_LOAD_COUNT1_REG 0x0004
+#define TIMER0_CURRENT_VALUE0_REG 0x0008
+#define TIMER0_CURRENT_VALUE1_REG 0x000c
+#define TIMER0_CONTROL_REG 0x0010
+#define TIMER0_INTSTATUS_REG 0x0018
+
+#define TIMER1_LOAD_COUNT0_REG 0x0020
+#define TIMER1_LOAD_COUNT1_REG 0x0024
+#define TIMER1_CURRENT_VALUE0_REG 0x0028
+#define TIMER1_CURRENT_VALUE1_REG 0x002c
+#define TIMER1_CONTROL_REG 0x0030
+#define TIMER1_INTSTATUS_REG 0x0038
+
+#define TIMER2_LOAD_COUNT0_REG 0x0040
+#define TIMER2_LOAD_COUNT1_REG 0x0044
+#define TIMER2_CURRENT_VALUE0_REG 0x0048
+#define TIMER2_CURRENT_VALUE1_REG 0x004c
+#define TIMER2_CONTROL_REG 0x0050
+#define TIMER2_INTSTATUS_REG 0x0058
+
+#define TIMER3_LOAD_COUNT0_REG 0x0060
+#define TIMER3_LOAD_COUNT1_REG 0x0064
+#define TIMER3_CURRENT_VALUE0_REG 0x0068
+#define TIMER3_CURRENT_VALUE1_REG 0x006c
+#define TIMER3_CONTROL_REG 0x0070
+#define TIMER3_INTSTATUS_REG 0x0078
+
+#define TIMER4_LOAD_COUNT0_REG 0x0080
+#define TIMER4_LOAD_COUNT1_REG 0x0084
+#define TIMER4_CURRENT_VALUE0_REG 0x0088
+#define TIMER4_CURRENT_VALUE1_REG 0x008c
+#define TIMER4_CONTROL_REG 0x0090
+#define TIMER4_INTSTATUS_REG 0x0098
+
+#define TIMER5_LOAD_COUNT0_REG 0x00a0
+#define TIMER5_LOAD_COUNT1_REG 0x00a4
+#define TIMER5_CURRENT_VALUE0_REG 0x00a8
+#define TIMER5_CURRENT_VALUE1_REG 0x00ac
+#define TIMER5_CONTROL_REG 0x00b0
+#define TIMER5_INTSTATUS_REG 0x00b8
+
+#define TIMER_CONTROL_INTERRUPT_MASK __BIT(2)
+#define TIMER_CONTROL_MODE __BIT(1)
+#define TIMER_CONTROL_ENABLE __BIT(0)
+
+#endif /* !_ROCKCHIP_TIMERREG_H */
