Module Name: src
Committed By: jmcneill
Date: Sun Jan 4 11:52:45 UTC 2015
Modified Files:
src/sys/arch/arm/rockchip: rockchip_board.c rockchip_var.h
Log Message:
add emac clk controls
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/rockchip/rockchip_board.c
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/rockchip/rockchip_var.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rockchip_board.c
diff -u src/sys/arch/arm/rockchip/rockchip_board.c:1.11 src/sys/arch/arm/rockchip/rockchip_board.c:1.12
--- src/sys/arch/arm/rockchip/rockchip_board.c:1.11 Fri Jan 2 21:59:29 2015
+++ src/sys/arch/arm/rockchip/rockchip_board.c Sun Jan 4 11:52:45 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: rockchip_board.c,v 1.11 2015/01/02 21:59:29 jmcneill Exp $ */
+/* $NetBSD: rockchip_board.c,v 1.12 2015/01/04 11:52:45 jmcneill Exp $ */
/*-
* Copyright (c) 2014 Jared D. McNeill <jmcne...@invisible.ca>
@@ -29,7 +29,7 @@
#include "opt_rockchip.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: rockchip_board.c,v 1.11 2015/01/02 21:59:29 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rockchip_board.c,v 1.12 2015/01/04 11:52:45 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -122,6 +122,12 @@ rockchip_cpll_get_rate(void)
}
u_int
+rockchip_dpll_get_rate(void)
+{
+ return rockchip_pll_get_rate(CRU_DPLL_CON0_REG, CRU_DPLL_CON1_REG);
+}
+
+u_int
rockchip_apll_get_rate(void)
{
return rockchip_pll_get_rate(CRU_APLL_CON0_REG, CRU_APLL_CON1_REG);
@@ -308,3 +314,65 @@ rockchip_i2c_get_rate(u_int port)
return rockchip_apb_get_rate();
}
}
+
+u_int
+rockchip_mac_get_rate(void)
+{
+ bus_space_tag_t bst = &rockchip_bs_tag;
+ bus_space_handle_t bsh;
+ uint32_t clksel_con21;
+ uint32_t mac_div_con;
+
+ rockchip_get_cru_bsh(&bsh);
+
+ clksel_con21 = bus_space_read_4(bst, bsh, CRU_CLKSEL_CON_REG(21));
+
+ mac_div_con = __SHIFTOUT(clksel_con21,
+ CRU_CLKSEL_CON21_MAC_DIV_CON);
+
+ if (clksel_con21 & CRU_CLKSEL_CON21_MAC_PLL_SEL) {
+ return rockchip_dpll_get_rate() / (mac_div_con + 1);
+ } else {
+ return rockchip_gpll_get_rate() / (mac_div_con + 1);
+ }
+}
+
+u_int
+rockchip_mac_set_rate(u_int rate)
+{
+ bus_space_tag_t bst = &rockchip_bs_tag;
+ bus_space_handle_t bsh;
+ uint32_t clksel_con21;
+ u_int dpll_rate, gpll_rate;
+ u_int div;
+
+ rockchip_get_cru_bsh(&bsh);
+
+ dpll_rate = rockchip_dpll_get_rate();
+ gpll_rate = rockchip_gpll_get_rate();
+
+ clksel_con21 = CRU_CLKSEL_CON21_MAC_DIV_CON_MASK |
+ CRU_CLKSEL_CON21_RMII_EXTCLK_SEL_MASK |
+ CRU_CLKSEL_CON21_MAC_PLL_SEL_MASK;
+ if (dpll_rate % rate == 0) {
+ clksel_con21 |= CRU_CLKSEL_CON21_MAC_PLL_SEL;
+ div = howmany(dpll_rate, rate);
+ } else {
+ div = howmany(gpll_rate, rate);
+ }
+ clksel_con21 |= __SHIFTIN(div - 1, CRU_CLKSEL_CON21_MAC_DIV_CON);
+
+#ifdef ROCKCHIP_CLOCK_DEBUG
+ const u_int old_rate = rockchip_mac_get_rate();
+#endif
+
+ bus_space_write_4(bst, bsh, CRU_CLKSEL_CON_REG(21), clksel_con21);
+
+#ifdef ROCKCHIP_CLOCK_DEBUG
+ const u_int new_rate = rockchip_mac_get_rate();
+
+ printf("%s: update %u Hz -> %u Hz\n", __func__, old_rate, new_rate);
+#endif
+
+ return 0;
+}
Index: src/sys/arch/arm/rockchip/rockchip_var.h
diff -u src/sys/arch/arm/rockchip/rockchip_var.h:1.9 src/sys/arch/arm/rockchip/rockchip_var.h:1.10
--- src/sys/arch/arm/rockchip/rockchip_var.h:1.9 Fri Jan 2 21:59:29 2015
+++ src/sys/arch/arm/rockchip/rockchip_var.h Sun Jan 4 11:52:45 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: rockchip_var.h,v 1.9 2015/01/02 21:59:29 jmcneill Exp $ */
+/* $NetBSD: rockchip_var.h,v 1.10 2015/01/04 11:52:45 jmcneill Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -68,6 +68,7 @@ bool rockchip_is_chip(const char *);
u_int rockchip_apll_get_rate(void);
u_int rockchip_cpll_get_rate(void);
+u_int rockchip_dpll_get_rate(void);
u_int rockchip_gpll_get_rate(void);
u_int rockchip_cpu_get_rate(void);
u_int rockchip_ahb_get_rate(void);
@@ -77,5 +78,7 @@ u_int rockchip_a9periph_get_rate(void);
u_int rockchip_mmc0_get_rate(void);
u_int rockchip_mmc0_set_div(u_int);
u_int rockchip_i2c_get_rate(u_int);
+u_int rockchip_mac_get_rate(void);
+u_int rockchip_mac_set_rate(u_int);
#endif /* _ARM_ROCKCHIP_ROCKCHIP_VAR_H_ */
