Module Name: src
Committed By: matt
Date: Sat Jun 6 20:53:38 UTC 2015
Modified Files:
src/sys/arch/mips/mips: trap.c
Log Message:
Add support for NMI exception (which don't use the cause register).
To generate a diff of this commit:
cvs rdiff -u -r1.236 -r1.237 src/sys/arch/mips/mips/trap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/mips/trap.c
diff -u src/sys/arch/mips/mips/trap.c:1.236 src/sys/arch/mips/mips/trap.c:1.237
--- src/sys/arch/mips/mips/trap.c:1.236 Wed Mar 26 17:42:00 2014
+++ src/sys/arch/mips/mips/trap.c Sat Jun 6 20:53:38 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: trap.c,v 1.236 2014/03/26 17:42:00 christos Exp $ */
+/* $NetBSD: trap.c,v 1.237 2015/06/06 20:53:38 matt Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@@ -39,7 +39,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.236 2014/03/26 17:42:00 christos Exp $");
+__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.237 2015/06/06 20:53:38 matt Exp $");
#include "opt_cputype.h" /* which mips CPU levels do we support? */
#include "opt_ddb.h"
@@ -99,16 +99,16 @@ const char * const trap_names[] = {
"r4k trap/r3k reserved 13",
"r4k virtual coherency instruction/r3k reserved 14",
"r4k floating point/ r3k reserved 15",
- "reserved 16",
+ "mips NMI",
"reserved 17",
"mipsNN cp2 exception",
- "reserved 19",
- "reserved 20",
+ "mipsNN TLBRI",
+ "mipsNN TLBXI",
"reserved 21",
"mips64 MDMX",
"r4k watch",
"mipsNN machine check",
- "reserved 25",
+ "mipsNN thread",
"DSP exception",
"reserved 27",
"reserved 28",
@@ -167,7 +167,11 @@ trap(uint32_t status, uint32_t cause, va
KSI_INIT_TRAP(&ksi);
curcpu()->ci_data.cpu_ntrap++;
- type = TRAPTYPE(cause);
+ if (status & MIPS3_SR_NMI) {
+ type = T_NMI;
+ } else {
+ type = TRAPTYPE(cause);
+ }
if (USERMODE(status)) {
tf = utf;
type |= T_USER;
@@ -193,7 +197,7 @@ trap(uint32_t status, uint32_t cause, va
USERMODE(status) ? "user" : "kernel");
sz -= n;
str += n;
- n = snprintf(str, sz, "status=0x%x, cause=0x%x, epc=%#"
+ n = snprintf(str, sz, "status=%#x, cause=%#x, epc=%#"
PRIxVADDR ", vaddr=%#" PRIxVADDR "\n",
status, cause, pc, vaddr);
sz -= n;
@@ -207,15 +211,17 @@ trap(uint32_t status, uint32_t cause, va
str += n;
} else {
n = snprintf(str, sz, "tf=%p ksp=%p ra=%#"
- PRIxREGISTER " ppl=%#x\n",
- tf, tf+1, tf->tf_regs[_R_RA],
- tf->tf_ppl);
+ PRIxREGISTER " ppl=%#x\n", tf,
+ type == T_NMI
+ ? (void*)(uintptr_t)tf->tf_regs[_R_SP]
+ : tf+1,
+ tf->tf_regs[_R_RA], tf->tf_ppl);
sz -= n;
str += n;
}
printf("%s", strbuf);
- if ((TRAPTYPE(cause) == 6) || (TRAPTYPE(cause) == 7))
+ if (type == T_BUS_ERR_IFETCH || type == T_BUS_ERR_LD_ST)
(void)(*mips_locoresw.lsw_bus_error)(cause);
#if defined(DDB)
