Module Name:    src
Committed By:   maya
Date:           Wed Mar  7 15:49:45 UTC 2018

Modified Files:
        src/sys/arch/mips/mips: locore.S

Log Message:
Add duplicate code that enables 64bit addressing under the right
macro conditions that is, _LP64.

The existing, previous code uses NOFPU as a condition for it.

This adds duplicated code (and later removes) for easy bisecting.


To generate a diff of this commit:
cvs rdiff -u -r1.211 -r1.212 src/sys/arch/mips/mips/locore.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/mips/mips/locore.S
diff -u src/sys/arch/mips/mips/locore.S:1.211 src/sys/arch/mips/mips/locore.S:1.212
--- src/sys/arch/mips/mips/locore.S:1.211	Wed Mar  7 15:44:15 2018
+++ src/sys/arch/mips/mips/locore.S	Wed Mar  7 15:49:45 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.S,v 1.211 2018/03/07 15:44:15 maya Exp $	*/
+/*	$NetBSD: locore.S,v 1.212 2018/03/07 15:49:45 maya Exp $	*/
 
 /*
  * Copyright (c) 1992, 1993
@@ -63,7 +63,7 @@
 #include <mips/trap.h>
 #include <mips/locore.h>
 
-RCSID("$NetBSD: locore.S,v 1.211 2018/03/07 15:44:15 maya Exp $")
+RCSID("$NetBSD: locore.S,v 1.212 2018/03/07 15:49:45 maya Exp $")
 
 #include "assym.h"
 
@@ -85,6 +85,14 @@ _C_LABEL(kernel_text):
 	mtc0	zero, MIPS_COP_0_CAUSE
 	COP0_SYNC
 
+#ifdef _LP64
+	/* Enable 64-bit addressing */
+	mfc0	k0, MIPS_COP_0_STATUS
+	MFC0_HAZARD
+	or	k0, MIPS_SR_KX | MIPS_SR_UX
+	mtc0	k0, MIPS_COP_0_STATUS
+#endif
+
 #ifdef MIPS64_OCTEON
 	//
 	// U-boot on the erlite starts all cpus at the kernel entry point.

Reply via email to