On Thursday 15 November 2012 10:15:08 Mark Brown wrote: > On Thu, Nov 15, 2012 at 12:33:31AM +0100, Jonas Gorski wrote: > > On 15 November 2012 00:17, Mark Brown > > > > This is only going to work around a relatively small subset of cases so > > > it doesn't seem worth rushing in. The normal fix for such issues is to > > > control /CS as a GPIO. > > > Well, one of the "small" subsets is SPI attached flash, those need > > write then read or write then write with CS asserted for most > > operations, too. And I'm not sure if controlling CS as a GPIO is an > > This is the case for essentially all devices with registers too. If it > were always fixing the issue (eg, by allocating a buffer if the one > supplied isn't suitable) that'd be fine but instead it's going to work > some but not all of the time which seems non-ideal
Devices that we care about on bcm63xx, which are connected to these built-in chip-selects are: - SPI flashes - SPI Ethernet switches (register based) - SPI SLIC/SLAC (register based as well) I assume any hardware design which needs specific CS treatment would wire it to a spare GPIO to fully control its assertion. Would you accept this patch provided that Jonas updates his commit log with this description of devices we support? -- Florian ------------------------------------------------------------------------------ Monitor your physical, virtual and cloud infrastructure from a single web console. Get in-depth insight into apps, servers, databases, vmware, SAP, cloud infrastructure, etc. Download 30-day Free Trial. Pricing starts from $795 for 25 servers or applications! http://p.sf.net/sfu/zoho_dev2dev_nov _______________________________________________ spi-devel-general mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/spi-devel-general
