Tony,
Thanks for pointing out that all requirements are not equally important. Some
may be extremely important while others are minimally important. Therefore, our
analysis should focus on the important requirements.
I agree that Encapsulation Header Size is the most important requirement. I
also agree that the Forwarding Efficiency requirement would be important, if it
were well-formed. However, I am not sure that it is well-formed.
The Forwarding Efficiency requirement assumes that the only significant factors
in forwarding efficiency are:
- Number of lookups
- Number of headers parsed
Are we sure that:
- there isn't a third significant factor that we are leaving out
- the cost of parsing a header may be high on one ASIC and minimal on another
And as you say, next-generation ASICs will be designed to accommodate whatever
solution we choose.
Ron
Juniper Business Use Only
-----Original Message-----
From: spring <[email protected]> On Behalf Of Tony Li
Sent: Thursday, September 16, 2021 6:24 PM
To: [email protected]
Subject: [spring] Thoughts on optimality
[External Email. Be cautious of content]
Hi all,
We now seem headed to be adopting both the requirements and analysis drafts and
thoughts start to turn towards the debate for selection.
The requirements draft has done a good job documenting our requirements and the
analysis draft gives us a perspective on how the various proposals fulfill
those requirements, but a deeper nuance is needed to guide us to making an
optimal choice.
To that end, it seems to me that three of the requirements are paramount:
- Encapsulation Header Size
- Forwarding Efficiency
- State Efficiency
Of these three, Forwarding Efficiency and State Efficiency seem like they will
be overcome by hardware technology. Continued growth in semiconductors will
help us scale here, so the remaing requirement of the Encapsulation Header Size
would seem to predominate, and we should therefore optimize for that.
Regards,
Tony
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