Hello Folks,

Greetings from Tiny Planet Inc.,

We have excellent ASIC/FPGA Design available immediately for project. Please
forward me your requirement details

at *[email protected]* <[email protected]> or call me at *562-275-3541*



*ASIC Design Engineer  : Rajarathinam Raghupathi*

*Location : Fremont, CA*

*Available : Immediate*

*Relocation : Yes,*


                        *Skills*                         Summary:

Over Seven Years Experience in ASIC/FPGA Front-end Design and Verification.


Over Seven  Years Experience in Digital Design, VHDL, Verilog-HDL languages.

Over Three  Years Experience in Shell, Perl Scripting.

Very Good Experience in HVLs *VERA* & e *(Specman).*

Good knowledge on C & C++ concepts.

Successful track record of delivering quality results in Multiple Projects.

Extensive Experience in Team environments.

Extensive Tools Experience Simulators like Mentor Graphics Model Sim, Xilinx
ISE, Cadence NC-VHDL, NC-Verilog, Synthesizer tool Mentor's Leonardo
Spectrum, Debuggers like Simvision, Verdi, Version control tools like
Accurev, Clear Case, Clear Quest, etc.,



Design &Verification

Extensive knowledge of Detailed Design & RTL implementation for the targeted
FPGA's and timing requirements.

Extensive experience writing and executing detailed Verification Plans for
various Avionics chips/ASIC's.

Hands on Experience in architecting, designing and implementing test benches
using VHDL, Verilog, Vera and e.

Knowledge of Ethernet, I2C, CAN, ARINC protocols, DES, AES crypto
algorithms, Video processors, Avionics standards DO-254, Oops concepts.




-- 
Thanks & Regards,

Naren
Technical Recruiter

Tiny Planet Inc
Ph: 562*275*3541
Fax: 866 346 3741
[email protected]
www.tinyplanetinc.com

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