At 08:23 -0400 07/28/2002, Craig Phillips wrote:
> [the subject line]
Part 2; Continued from Part 1
(Some of this needs to line up properly, so best displayed in Courier)
Some explanation of architecture
====================================
As you can see, the architecture of each machine is a hierarchy of
busses. A bus is just a set of wires which a bunch of devices have
in common. So, e.g., the CPU/memory bus consists of 32 wires
carrying addresses (32 bit addressing), 64 wires carrying data
(memory is 64 bits wide), and various control and arbitration lines
which help the devices on the CPU bus to decide who gets to talk when.
The CPU(s), Hammerhead memory controller* and Bandit** PCI Controller
live at the top level, the CPU/Memory Bus. So when you talk about a
bus speed such as 45 MHz or 50 MHz, that's the speed this bus runs at.
There are other busses on the computer. To get data from the main
CPU/Memory bus to these other busses, there must be a device to
translate between the two busses. These devices are called Bridges.
For example, the PCI bus has only 32 data/address lines. It uses the
same wires for both data and addresses. Clearly that's very
different from the CPU bus's 32 + 64 arrangement. So a Bridge chip
must translate from data on the CPU bus to data on the PCI bus.
The Bandit chip is a CPU-PCI Bridge. It takes the information on the
CPU bus that is targeted at the PCI bus and translates it. So the
upstream side of the Bandit is on the CPU bus and the downstream side
of the Bandit is on the PCI bus.
Included in the PCI Standards documentation is the description of a
type of bridge called a PCI-PCI Bridge. The PCI-PCI Bridge (PPB)
bridges data between two PCI busses. So, on the upstream side
(Primary PCI Bus) the PPB acts like a PCI device and uses the same
space a PCI slot would. On the downstream side (Secondary PCI Bus)
the PPB contains connections for an additional four (more is
possible, but four is typical) PCI slots. The downstream side of the
PPB and it's four daughter slots all share the wires (32 data/address
+ control lines) of their own separate PCI bus. They aren't on the
wires of the primary PCI Bus. The PPB chip bridges between the
upstream bus and the downstream Bus.
In place of Slot 3 (or C1) the S900 has a PCI-PCI Bridge, a DEC
21052AB chip to be specific. The DEC 21052 takes the third PCI
"slot" and converts it into a secondary PCI bus with four more slots.
This hierarchy of PCI busses is part of the PCI standard and all PCI
machines that follow the specification should support it. In fact,
according to the specification, one should be able to create several
levels of hierarchy, even to the point of putting 1024 PCI slots on
one CPU/PCI Bridge using many levels of hierarchy and several hundred
PPB chips.
The PTP, 9500, 9600 and Genesis use a different approach to get more
PCI slots. They simply add a second Bandit CPU-PCI Bridge to the
CPU/Memory bus. Then hang an additional three PCI slots off of
Bandit 2. Notice that Bandit 1 has Grand Central and Bandit 2 does
not. This means that Apple could have put a fourth slot on Bandit 2
if it had chosen to. In fact, in the Apple Network Server, the
second Bandit chip does support four PCI slots.
So, examining the diagrams (these are loosely based on the block
diagrams in Apple's Developer PDFs, which you can download from
Apple's support site) you can see that only slots 1 & 2 on the S900
correspond to slots on the PTP/9500/etc and they correspond to slots
A1 and B1. What would be slot C1 is occupied by the PPB.
I added the 7x00 and 8x00 machines to the discussion here, to show
that they're just like a 9500, except Bandit 2 has been removed and
the CHAOS/Control video bridge has been added to the CPU/Memory bus.
In fact, they use the same ROMs as the 9x00 series.
Note that the PowerWave is the simplest of all the machines. It has
one Bandit with three PCI slots and no PPB, nor any additional
devices on the CPU/Memory bus--no second Bandit, no video bridge.
The S900 is actually most similar to the PowerWave, because the only
difference is that the S900 has the PPB hung off of what would be
slot C1 in the PowerWave.
* Hammerhead is marked 343S1190
** Bandit is marked 343S0020
Behavioral Differences
=======================================
In theory, one should be able to go several levels deep in PCI-PCI
Bridges, building a huge hierarchy of PCI busses. The practice is
somewhat different on the S900. The lower four slots which are
behind the PPB have many incompatibilities. The most general of the
incompatibilities is that multi-function PCI cards do not work
properly in the lower slots.
In order to be a multi-function card, a PCI card typically has a
PCI-PCI Bridge of it's own on the card. This PPB creates a secondary
PCI bus on the PCI card itself, and then has a couple of PCI devices
on this bus on the card. Like so:
slot
|
PCI-PCI Bridge on card
|
PCI bus (on card)-------------------------------------
| |
device 1 device 2
Where device 1 might be a USB controller and device 2 might be a
Firewire controller, e.g..
Or take Sonnet's new Trio card with ATA133, USB and Firewire all on
one card. They've simply used one more of the four slots available
on a PPB, like so:
slot
|
PCI-PCI Bridge on Trio
|
PCI bus (on card)-------------------------------------
| | |
ATA-133 chip USB chip Firewire chip
Okay, I digressed a little there. Anyway, when you use one of these
multifunction cards in the lower four slots of the S900, you create a
hierarchy of two PPBs. You've got the DEC 21052 on the S900, and
then under that, you've got whatever PPB is on the PCI card in
question.
In practice this almost never works on the S900. The only times it
works are when there are no other cards in the other three lower
slots of the S900, or when the other cards in the lower slots do not
have on-board firmware. Cards such as ethernet, USB and firewire
cards do not have on-board firmware. Oh, and the Adaptec 2906, but
it's a strange bird.
Other examples of dual function cards are dual channel SCSI cards
such as the Adaptec 3940 or 39160, most dual head video card (Radeon
7000 may be an exception), and odd cards such as the rare
firewire/SCSI cards.
I believe that this incompatibitity is caused by a flaw in Apple's
PCI implementation in the ROMs. A way to test that would be to try
to install a hierarchy of two or more PPBs on an Apple x500 machine
and see if it behaves similarly, but I've never found anyone who is,
e.g., using a Magma on one of these machines.
The other incompatibilities in the lower slots are on a card by card
basis. For example, the Ult. Rez. card has difficulties in the lower
slots, but not if you don't load one of its extensions. I would
guess that this problem is an error on the part of ixMicro's software
developers.
The VST UltraTech/66 card behaves like a dual function card in the
lower slots--has the same problem. But it does not have a PPB on
board. I think something it does in its firmware makes itself looks
like a dual function card to Apple ROM, but that's a guess.
On the PTP/9500/etc. the PCI slots are mostly without problems.
However, there is an issue with the lower three slots of these
machines and G4 CPU upgrades. Something about the G4 chip causes
problems with the PCI slots which are connected to Bandit 2. If you
look at the diagrams above, you can see that Bandit 2 adds a little
more complexity to the CPU/Memory bus. Apparently, the combination
of that complexity and something about the G4 card causes problems
with how the Bandit 2 communicates with the Memory/CPU bus. This
problem does not exist in machines with only a single Bandit chip,
such as the S900.
Jeff Walther
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